SILICON MEMS

Fabrication of microsuspensions on silicon substrate

[+] Author Affiliations
Bahram Ghodsian

La Jolla Microsystems Institute, 7568 Mona Lane, San Diego, California?92130-5618 E-mail: ghodsian@ieee.org

J. Micro/Nanolith. MEMS MOEMS. 1(2), 154-158 (Jul 01, 2002). doi:10.1117/1.1484162
History: Received July 9, 2001; Revised Jan. 24, 2002; Accepted Apr. 18, 2002; Online July 19, 2002
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A new technique to remove the silicon from beneath a large structure, by micromachining for making a suspended microstructure both for thermal, as well as electromagnetic, isolations on a complementary metal–oxide–semiconductor (CMOS) chip is reported. Conventional methods require two step front-side etching, an isotropic step, followed by an anisotropic etching step. An alternative technique is based on the backside etching process, which requires extra masks, and processing steps. In order to keep the postprocessing steps to a minimum, a simple technique has been developed that exploits the front-side anisotropic etching to create both undercuttings as well as deep etching in one single step. This method uses the gate oxide and polysilicon layer in CMOS technology as the sacrificial layer for initiating the undercutting needed to make a freestanding microstructure. The microsuspension thickness, width and length of 2 μm, 150μm×150μm, respectively, are made out of low-pressure chemical vapor deposition oxide and have been fabricated. © 2002 Society of Photo-Optical Instrumentation Engineers.

© 2002 Society of Photo-Optical Instrumentation Engineers

Citation

Bahram Ghodsian
"Fabrication of microsuspensions on silicon substrate", J. Micro/Nanolith. MEMS MOEMS. 1(2), 154-158 (Jul 01, 2002). ; http://dx.doi.org/10.1117/1.1484162


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