Special Section on Mask Technology for Optical Lithography

Complementary double-exposure technique (CODE): a way to print 80- and 65-nm gate levels using a double-exposure binary mask approach

[+] Author Affiliations
Serdar Manakli

STMicroelectronics, 850 rue J. Monnet, 38926?Crolles, France

Centre National de la Recherche Scientifique, Laboratoire des Technologies de la Microe´lectronique, c/o CEA-Grenoble, 17 rue des Martyrs, 38054?Grenoble Cedex09, France

Yorick Trouiller

LETI-CEA, 17 rue des Martyrs, 38054?Grenoble Cedex09, France

Olivier Toublan

Mentor Graphics, 7B chemin de la Dhuy, 38240?Meylan, France

Patrick Schiavone

Centre National de la Recherche Scientifique, Laboratoire des Technologies de la Microe´lectronique, c/o CEA-Grenoble, 17 rue des Martyrs, 38054?Grenoble Cedex09, France

Yves Rody

Philips Semiconductors, 850 rue J. Monnet, 38926?Crolles, France

P. J. Goirand

STMicroelectronics, 850 rue J. Monnet, 38926?Crolles, France

J. Micro/Nanolith. MEMS MOEMS. 3(2), 305-315 (Apr 01, 2004). doi:10.1117/1.1683359
History: Received Aug. 8, 2003; Revised Dec. 10, 2003; Accepted Dec. 19, 2003; Online March 31, 2004
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To follow the accelerating ITRS roadmap, microprocessor and DRAM manufacturers are on their way to introduce the alternating phase shift mask (APSM) to be able to print the gate level on sub-130-nm devices. This is done at very high mask costs, long cycle times, and poor guarantees to get defect-free masks. Nakao et al. have proposed a new resolution enhancement technique (RET). They have shown that sub-0.1-μm features could be printed with good process latitudes using a double binary mask printing technique. This solution is very interesting, but is applicable to isolated structures only. To overcome this limitation, we have developed an extension of this technique called complementary double exposure (CODE). It combines Nakao’s technique and the use of assist features that are removed during a second subsequent exposure. This new method enables us to print isolated as well as dense features on advanced devices using two binary masks. We describe all the steps required to develop the CODE application. The layout rules generation and the impact of the second mask on the process latitude have been studied. Experimental verification has been done using 193-nm 0.63 and 0.75 numerical aperture (NA) scanners. The improvement brought by quadrupole or annular illuminations combined with CODE has also been evaluated. Finally, the results of the CODE technique, applied to a portion of a real circuit using all the developed rules, are shown. © 2004 Society of Photo-Optical Instrumentation Engineers.

© 2004 Society of Photo-Optical Instrumentation Engineers

Citation

Serdar Manakli ; Yorick Trouiller ; Olivier Toublan ; Patrick Schiavone ; Yves Rody, et al.
"Complementary double-exposure technique (CODE): a way to print 80- and 65-nm gate levels using a double-exposure binary mask approach", J. Micro/Nanolith. MEMS MOEMS. 3(2), 305-315 (Apr 01, 2004). ; http://dx.doi.org/10.1117/1.1683359


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