Articles

Double-patterning interactions with wafer processing, optical proximity correction, and physical design flows

[+] Author Affiliations
Kevin Lucas

Synopsys Inc., 1301 South Mopac Expressway, Austin, Texas 78746

Christopher Cork

Synopsys SARL, 12 Rue Lavoisier, 38330 Montbonnot, France

Alexander Miloslavsky

Synopsys Inc., 700 East Middlefield Road, Mountain View, California 94043

Gerard Luk-Pat

Synopsys Inc., 700 East Middlefield Road, Mountain View, California 94043

Levi Barnes

Synopsys Inc., 2025 NW Cornelius Pass Road, Hillsboro, Oregon 97124

John Hapli

Synopsys Inc., One Antares Drive, Nepean, Ontario K2E 8C4 Canada

John Lewellen, Greg Rollins

Synopsys Inc., 700 East Middlefield Road, Mountain View, California 94043

Vincent Wiaux

IMEC, Kapeldreef 75, B3001 Leuven, Belgium

Staf Verhaegen

IMEC, Kapeldreef 75, B3001 Leuven, Belgium

J. Micro/Nanolith. MEMS MOEMS. 8(3), 033002 (July 07, 2009). doi:10.1117/1.3158061
History: Received June 13, 2008; Revised January 05, 2009; Accepted May 18, 2009; Published July 07, 2009
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In this paper we study interactions of double patterning technology (DPT) with lithography, optical proximity correction (OPC) and physical design flows for the 22-nm device node. DPT methods decompose the original design intent into two individual masking layers, which are each patterned using single exposures and existing 193-nm lithography tools. Double exposure and etch patterning steps create complexity for both process and design flows. DPT decomposition is a critical software step that will be performed in physical design and also in mask synthesis. Decomposition includes cutting (splitting) of original design intent polygons into multiple polygons, where required, and coloring of the resulting polygons. We evaluate the ability to meet key physical design goals, such as reduce circuit area, minimize relayout effort, ensure DPT compliance, guarantee patterning robustness on individual layer targets, ensure symmetric wafer results, and create uniform wafer density for the individual patterning layers.

© 2009 Society of Photo-Optical Instrumentation Engineers

Citation

Kevin Lucas ; Christopher Cork ; Alexander Miloslavsky ; Gerard Luk-Pat ; Levi Barnes, et al.
"Double-patterning interactions with wafer processing, optical proximity correction, and physical design flows", J. Micro/Nanolith. MEMS MOEMS. 8(3), 033002 (July 07, 2009). ; http://dx.doi.org/10.1117/1.3158061


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