6 November 2014 Resist toploss and profile modeling for optical proximity correction applications
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Abstract
As critical dimensions decrease for 32-nm node and beyond, the resist loss increases and resist patterns become more vulnerable to etching failures. Traditional optical proximity correction (OPC) models only consider two-dimensional (XY) contours and neglect height (Z) variations. Rigorous resist simulators can simulate a three-dimensional (3-D) resist profile, but they are not fast enough for correction or verification on a full chip. However, resist loss for positive-tone resists is mainly driven by optical intensity variations, which are accurately modeled by the optical portion of an OPC model. We show that a compact resist model can be used to determine resist loss by properly selecting the optical image plane for calibration. The model can then be used to identify toploss hotspots on a full chip and, in some cases, for correction of these patterns. In addition, the article will show how the model can be made more accurate by accounting for some 3-D effects like diffusion through height.
© 2014 Society of Photo-Optical Instrumentation Engineers (SPIE) 0091-3286/2014/$25.00 © 2014 SPIE
Christian D. Zuniga and Yunfei Deng "Resist toploss and profile modeling for optical proximity correction applications," Journal of Micro/Nanolithography, MEMS, and MOEMS 13(4), 043010 (6 November 2014). https://doi.org/10.1117/1.JMM.13.4.043010
Published: 6 November 2014
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CITATIONS
Cited by 4 scholarly publications and 1 patent.
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KEYWORDS
Optical proximity correction

Calibration

Diffusion

Cadmium

3D modeling

Semiconducting wafers

Critical dimension metrology

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