Optimized lithography process for through-silicon vias-fabrication using a double-sided (structured) photomask for mask aligner lithography

Tina Weichelt; Lorenz Stuerzebecher; Uwe D. Zeitner

doi:10.1117/1.JMM.14.3.034501

13 August 2015 Optimized lithography process for through-silicon vias-fabrication using a double-sided (structured) photomask for mask aligner lithography

Tina Weichelt, Lorenz Stuerzebecher, Uwe D. Zeitner

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Journal of Micro/Nanolithography, MEMS, and MOEMS, Vol. 14, Issue 3, 034501 (August 2015). https://doi.org/10.1117/1.JMM.14.3.034501

Abstract

Through-silicon vias (TSV) are very important for wafer-level packaging as they provide patterning holes through thick silicon dies to integrate and interconnect devices which are stacked in the z-direction. For economic processing, TSV fabrication primarily needs to be cost effective, especially for a high throughput. Furthermore, a lithography process for TSV has to be stable enough to allow patterning on prestructured substrates with inhomogeneous topography. This can be addressed by an exposure process which offers a large depth of focus. We have developed a mask-aligner lithography process based on the use of a double-sided photomask to realize aerial images that meet these constraints.

Weichelt, Stuerzebecher, and Zeitner: Optimized lithography process for through-silicon vias-fabrication using a double-sided (structured) photomask for mask aligner lithography

CC BY: © The Authors. Published by SPIE under a Creative Commons Attribution 4.0 Unported License. Distribution or reproduction of this work in whole or in part requires full attribution of the original publication, including its DOI.

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Tina Weichelt, Lorenz Stuerzebecher, and Uwe D. Zeitner "Optimized lithography process for through-silicon vias-fabrication using a double-sided (structured) photomask for mask aligner lithography," Journal of Micro/Nanolithography, MEMS, and MOEMS 14(3), 034501 (13 August 2015). https://doi.org/10.1117/1.JMM.14.3.034501

Published: 13 August 2015

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