Paper
4 March 2019 Backside optical I/O module for Si photonics integrated with electrical ICs using fan-out wafer-level packaging technology
Hiroshi Uemura, Kaori Warabi, Kazuya Ohira, Yoichiro Kurita, Hideto Furuyama, Yoshiaki Sugizaki, Hideki Shibata
Author Affiliations +
Proceedings Volume 10924, Optical Interconnects XIX; 1092416 (2019) https://doi.org/10.1117/12.2504855
Event: SPIE OPTO, 2019, San Francisco, California, United States
Abstract
We propose a novel Si photonics module that overcomes the issues of conventional Si photonics modules such as package structure and electrical connection. The module incorporates an optical fiber socket fabricated by blind via socket (BVS) technology, which implements backside optical I/O in a photonic IC (PIC) by forming blind via holes on the backside. High-speed high-density electrical connection to both the PIC and an electrical IC (EIC) is also obtained in the module by fan-out wafer level packaging (FOWLP) technology. These technologies achieve a surface-mountable substrate-less fan-out optical module. It realizes a practicable integrated module of optoelectronic devices excellent in terms of electrical characteristics such as signal integrity (SI) and power integrity (PI), heat characteristics, and miniaturization. This paper presents a BVS module that enables optical coupling between a III-V/Si photodiode (PD) fabricated on a Si substrate and a multi-mode optical fiber by passive alignment of only insertion of the fiber into a blind via hole on the backside. High-speed optical signal transmission is also demonstrated with a fan-out optical module in which a BVS and an EIC are integrated by FOWLP and a vertical-cavity surface-emitting laser (VCSEL) or PD is mounted on the BVS.
© (2019) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Hiroshi Uemura, Kaori Warabi, Kazuya Ohira, Yoichiro Kurita, Hideto Furuyama, Yoshiaki Sugizaki, and Hideki Shibata "Backside optical I/O module for Si photonics integrated with electrical ICs using fan-out wafer-level packaging technology", Proc. SPIE 10924, Optical Interconnects XIX, 1092416 (4 March 2019); https://doi.org/10.1117/12.2504855
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KEYWORDS
Silicon

Semiconducting wafers

Optical fibers

Photonic integrated circuits

Photonics

Silicon photonics

Wafer-level optics

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