Control of sidewall roughness formation in through-silicon via etch at non-cryogenic temperatures

John M. Papalia; Devi Koty; Nathan Marchack; Scott Lefevre; Qingyun Yang; Aelan Mosden; Sebastian U. Engelmann; Robert L. Bruce

doi:10.1117/12.2614264

25 May 2022 Control of sidewall roughness formation in through-silicon via etch at non-cryogenic temperatures

John M. Papalia, Devi Koty, Nathan Marchack, Scott Lefevre, Qingyun Yang, Aelan Mosden, Sebastian U. Engelmann, Robert L. Bruce

Author Affiliations +

Proceedings Volume 12056, Advanced Etch Technology and Process Integration for Nanopatterning XI; 1205603 (2022) https://doi.org/10.1117/12.2614264
Event: SPIE Advanced Lithography + Patterning, 2022, San Jose, California, United States

Abstract

Through‐silicon via etch (TSV) is critical to current and future advanced packaging schemes. For heterogeneous integration approaches in particular, where modular components are tightly packed together, these processes play an integral role. While etch processes for silicon appear well understood and the frontiers of plasma etch have led us to advanced cyclic processes for device fabrication such as atomic layer etching, TSV applications are fundamentally different due to their relative size and aspect ratio targets. Unlike small-scale etching, TSV feature etching has not shown exponential change over time. To achieve TSV targets such as high etch rate, high aspect ratio, and clean profiles to support filling, known solutions are employed such as cryogenic wafer temperatures, alternative hard mask schemes, and extremely short gas cycle times; these solutions require specialized equipment and/or a more complex integration scheme. We explore the creation of high-aspect ratio, diffusion-limited TSV etches with high PR selectivity (<50:1) and high aspect ratios while simultaneously aiming for a high etch rate all while using non-cryogenic temperatures and a standard photoresist mask. A focus on sidewall profile and sidewall damage is maintained.

Conference Presentation

Citation Download Citation

John M. Papalia, Devi Koty, Nathan Marchack, Scott Lefevre, Qingyun Yang, Aelan Mosden, Sebastian U. Engelmann, and Robert L. Bruce "Control of sidewall roughness formation in through-silicon via etch at non-cryogenic temperatures", Proc. SPIE 12056, Advanced Etch Technology and Process Integration for Nanopatterning XI, 1205603 (25 May 2022); https://doi.org/10.1117/12.2614264

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