Analog in-memory computing with embedded resistive devices: metrology challenges, and opportunities

Vijay Narayanan

doi:10.1117/12.3014734

10 April 2024 Analog in-memory computing with embedded resistive devices: metrology challenges, and opportunities

Vijay Narayanan

Proceedings Volume 12955, Metrology, Inspection, and Process Control XXXVIII; 1295503 (2024) https://doi.org/10.1117/12.3014734
Event: SPIE Advanced Lithography + Patterning, 2024, San Jose, California, United States

Abstract

With the explosive growth of artificial intelligence (AI) has come an immense and growing computational burden that is outpacing the rate of traditional logic scaling. To tackle this challenge, IBM is pioneering an analog in-memory compute (IMC) technology that promises to considerably reduce the energy consumption needed for AI workloads by performing the computation directly in memory using resistive non-volatile memory (NVM) devices. This talk will detail the materials and device innovations that enable analog IMC and the challenges encountered in creating a scalable technology. In particular, the importance of controlling variability for a resistive processing unit will be highlighted. In addition, the novel metrology techniques needed to optimize the performance of the key analog materials will be discussed. It will be shown that by comprehending the materials and stochastic characteristics of the NVM devices and co-optimizing with algorithms and architectures, large improvements in energy efficiency can be obtained.

Conference Presentation

Citation Download Citation

Vijay Narayanan "Analog in-memory computing with embedded resistive devices: metrology challenges, and opportunities", Proc. SPIE 12955, Metrology, Inspection, and Process Control XXXVIII, 1295503 (10 April 2024); https://doi.org/10.1117/12.3014734

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KEYWORDS

Analog electronics

Metrology

Artificial intelligence

Energy efficiency

Evolutionary algorithms

Explosives

Logic

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