Study of selective dry etching Si0.7Ge0.3 with different plasma source in process of gate-all-around FET

Enxu Liu; Chaoran Yang; Junjie Li; Na Zhou; Longrui Xia; Rui Chen; Hua Shao; Jianfeng Gao; Zhenzhen Kong; Chenchen Zhang; Panpan Lai; Tao Yang; Yayi Wei; Junfeng Li; Jun Luo; Wenwu Wang

doi:10.1117/12.3010332

9 April 2024 Study of selective dry etching Si_0.7Ge_0.3 with different plasma source in process of gate-all-around FET

Enxu Liu, Chaoran Yang, Junjie Li, Na Zhou, Longrui Xia, Rui Chen, Hua Shao, Jianfeng Gao, Zhenzhen Kong, Chenchen Zhang, Panpan Lai, Tao Yang, Yayi Wei, Junfeng Li, Jun Luo, Wenwu Wang

Author Affiliations +

Proceedings Volume 12958, Advanced Etch Technology and Process Integration for Nanopatterning XIII; 129580F (2024) https://doi.org/10.1117/12.3010332
Event: SPIE Advanced Lithography + Patterning, 2024, San Jose, California, United States

Abstract

The lateral gate-all-around (GAA) field effect transistor is considered to be the most promising candidate for the next generation of logic devices at the 3nm technology node and beyond. SiGe plays an important role as a sacrificial layer in the GAA device, which requires isotropic etching, and the quality of the etching has a critical impact on the device performance. However, there is no definite scheme in the industry for the choice of etching method. In this paper, we choose two etching methods: CP(Inductively coupled Plasma) and RPS (Remote Plasma Source) etching according to the presence or absence of particle incidence. The profile and etching effect of the two etching methods are analyzed by PEGASUS simulation software. The presence or absence of particle incidence has different effects on the damage of the structure, the inconsistency of etching amount and the reflection of the particles on the Si surface. Compared with ICP etching, the optimization of RPS etching on etching damage and etch amount consistency is verified by TEM and roughness characterization . And through the extraction of MOSCAP capacitance, it is found that the density of interface states(Dit) after ICP etching is 3.5 times higher than that of RPS etching.

Conference Presentation

Citation Download Citation

Enxu Liu, Chaoran Yang, Junjie Li, Na Zhou, Longrui Xia, Rui Chen, Hua Shao, Jianfeng Gao, Zhenzhen Kong, Chenchen Zhang, Panpan Lai, Tao Yang, Yayi Wei, Junfeng Li, Jun Luo, and Wenwu Wang "Study of selective dry etching Si_0.7Ge_0.3 with different plasma source in process of gate-all-around FET", Proc. SPIE 12958, Advanced Etch Technology and Process Integration for Nanopatterning XIII, 129580F (9 April 2024); https://doi.org/10.1117/12.3010332

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available