Paper
30 July 2002 Introduction of full-level alternating phase-shift mask technology into IC manufacturing
Joerg Thiele, Marco Ahrens, Wolfgang Dettmann, M. Heissmeier, Mario Hennig, Burkhard Ludwig, Molela Moukara, Rainer Pforr
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Abstract
A study to partition a gate level design into an alternating phase shift mask and a chrome on glass trim mask is presented. After determination of important rules for the partitioning by simulation, all investigated gate level pattern could be partitioned, only with slight modifications of the wiring. By application of optical proximity correction (OPC) good gate width and sufficient pattern fidelity control was obtained with the chosen OPC methodology using a calibrated optical model. Nevertheless, several indications of weak spots at two dimensional patterns at extreme defocus are discussed based on experimental data and simulation. To further improve the process window of such pattern, new methods are necessary to detect and prevent such remaining weak spots.
© (2002) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Joerg Thiele, Marco Ahrens, Wolfgang Dettmann, M. Heissmeier, Mario Hennig, Burkhard Ludwig, Molela Moukara, and Rainer Pforr "Introduction of full-level alternating phase-shift mask technology into IC manufacturing", Proc. SPIE 4691, Optical Microlithography XV, (30 July 2002); https://doi.org/10.1117/12.474639
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Cited by 1 scholarly publication and 1 patent.
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KEYWORDS
Photomasks

Optical proximity correction

Semiconducting wafers

Calibration

Critical dimension metrology

Lithography

Data modeling

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