Local IP evaluations of EPL reticle with 4 mm-sq Si membranes

Kaoru Koike; Hiroshi Sakaue; Hiroshi Arimoto; Tukasa Yamazaki; Hiroshi Sugimura; Takashi Susa; Kojiro Ito; Akira Tamura

doi:10.1117/12.617467

28 June 2005 Local IP evaluations of EPL reticle with 4 mm-sq Si membranes

Kaoru Koike, Hiroshi Sakaue, Hiroshi Arimoto, Tukasa Yamazaki, Hiroshi Sugimura, Takashi Susa, Kojiro Ito, Akira Tamura

Proceedings Volume 5853, Photomask and Next-Generation Lithography Mask Technology XII; (2005) https://doi.org/10.1117/12.617467
Event: Photomask and Next Generation Lithography Mask Technology XII, 2005, Yokohama, Japan

Abstract

Electron projection lithography (EPL) is one of the most promising candidates for the next generation lithography toward the hp 45 nm-node and beyond. EPL employs a stencil mask made from 200 mm Si wafer without a support frame, therefore chucking of an EPL tool and a metrology tool causes deformation in an EPL reticle. However, linear components of sub-field (SF) position error can be corrected by reticle alignment features of an EPL tool, whereas the non-linear components of SF position error can be corrected where each SF is measured beforehand and the corresponding reticle distortion correction (RDC) data is fed into the EPL exposure tool. In order to realize higher throughput, expanding SF to 4 mm-sq on reticle scale from the present 1 mm-sq is examined at the future EPL tool. For our studies we have investigated global image placement (IP), local IP, and pattern distortion of two kinds of EPL reticle. Currently we find the effect of mask IP on wafer scale is less than 9 nm, and we believe that in the near future the EPL mask IP target for the hp 45 nm-node could be realized for both of SF size.

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Kaoru Koike, Hiroshi Sakaue, Hiroshi Arimoto, Tukasa Yamazaki, Hiroshi Sugimura, Takashi Susa, Kojiro Ito, and Akira Tamura "Local IP evaluations of EPL reticle with 4 mm-sq Si membranes", Proc. SPIE 5853, Photomask and Next-Generation Lithography Mask Technology XII, (28 June 2005); https://doi.org/10.1117/12.617467

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KEYWORDS

Reticles

Distortion

Semiconducting wafers

Photomasks

Metrology

Silicon

Electron beam lithography

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