Paper
4 December 2008 Alternative technology for double patterning process simplification
Hee-Youl Lim, Kyo-Young Jang, Jae-Heon Kim, Sung-Gu Lee, Sarohan Park, Tae-Hwan Kim, Cheol-Kyu Bok, Seung-Chan Moon
Author Affiliations +
Proceedings Volume 7140, Lithography Asia 2008; 714020 (2008) https://doi.org/10.1117/12.804657
Event: SPIE Lithography Asia - Taiwan, 2008, Taipei, Taiwan
Abstract
In this paper, we will present experimental results on sub-40nm node patterning of DRAM and some technical issues for capping freezing in simplified double patterning lithography. Lithography resolution limit of single pattern is 40nm in ArF immersion process. For sub-40nm patterning, we have to use double patterning lithography or EUV process. But, double patterning lithography process is very complicated and expensive solution. And EUV volume production technology will be not ready until 2012. Therefore, we have tried a simplified double patterning lithography.
© (2008) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Hee-Youl Lim, Kyo-Young Jang, Jae-Heon Kim, Sung-Gu Lee, Sarohan Park, Tae-Hwan Kim, Cheol-Kyu Bok, and Seung-Chan Moon "Alternative technology for double patterning process simplification", Proc. SPIE 7140, Lithography Asia 2008, 714020 (4 December 2008); https://doi.org/10.1117/12.804657
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KEYWORDS
Double patterning technology

Lithography

Photomasks

Etching

Photoresist materials

Optical lithography

Image processing

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