EUV processing investigation on state of the art coater/developer system

H. Shite; N. Bradon; T. Shimoaoki; S. Kobayashi; K. Nafus; H. Kosugi; P. Foubert; J. Hermans; E. Hendrickx; M. Goethals; R. Gronheid; C. Jehoul

doi:10.1117/12.879406

8 April 2011 EUV processing investigation on state of the art coater/developer system

H. Shite, N. Bradon, T. Shimoaoki, S. Kobayashi, K. Nafus, H. Kosugi, P. Foubert, J. Hermans, E. Hendrickx, M. Goethals, R. Gronheid, C. Jehoul

Author Affiliations +

Proceedings Volume 7969, Extreme Ultraviolet (EUV) Lithography II; 796937 (2011) https://doi.org/10.1117/12.879406
Event: SPIE Advanced Lithography, 2011, San Jose, California, United States

Abstract

In order to further understand the processing sensitivities of the EUV resist process, TEL and imec have continued their collaborative efforts. For this work, TEL has delivered and installed the state of the art, CLEAN TRACK™ LITHIUS Pro™ -EUV coater/developer to the newly expanded imec 300mm cleanroom in Leuven, Belgium. The exposures detailed in this investigation were performed off-line to the ASML EUV Alpha Demo Tool (ADT) as well as on the inline ADT cluster with CLEAN TRACK™ ACT™ 12 coater/developer. As EUV feature sizes are reduced, is it apparent that there is a need for more precise processing control, as can be demonstrated in the LITHIUS Pro™ -EUV. In previous work from this collaboration1, initial investigations from the ACT™ 12 work showed reasonable results; however, certainly hardware and processing improvements are necessary for manufacturing quality processing performance. This work continues the investigation into CDU and defectivity performance, as well as improvements to the process with novel techniques such as advanced defect reduction (ADR), pattern collapse mitigation with FIRM™Extreme and resolution improvement with tetrabutylammoniumhydroxide (TBAH).

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H. Shite, N. Bradon, T. Shimoaoki, S. Kobayashi, K. Nafus, H. Kosugi, P. Foubert, J. Hermans, E. Hendrickx, M. Goethals, R. Gronheid, and C. Jehoul "EUV processing investigation on state of the art coater/developer system", Proc. SPIE 7969, Extreme Ultraviolet (EUV) Lithography II, 796937 (8 April 2011); https://doi.org/10.1117/12.879406

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KEYWORDS

Photoresist processing

Extreme ultraviolet

Line width roughness

Extreme ultraviolet lithography

Semiconducting wafers

Etching

Standards development

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