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We propose an interconnect model for multi-chip modules based on integration of a silicon photonic chip with single-mode polymer waveguides fabricated on the low-cost glass interposer technology. We present a detailed power-budget analysis of the on-chip photonic interconnect capable of 1 Tb/s chip-to-chip interconnection bandwidth. For this analysis, we consider state-of-the art photonics foundry modulators and detectors. We also discuss efficient-coupling strategies between the interconnect waveguides and the silicon photonic chip. Our analysis identifies key design parameters impacting the overall performance of the proposed interconnection approach in terms of energy-consumption, distance, and bandwidth and compare its performance with alternative approaches.
Rakesh Krishna VS,Rui Zhang,Mohan Kathaperumal,Fuhan Liu,Madhavan Swaminathan, andAli Adibi
"Design and optimization of photonic interconnect for heterogenous integration", Proc. SPIE 11694, Photonic and Phononic Properties of Engineered Nanostructures XI, 1169424 (5 March 2021); https://doi.org/10.1117/12.2590744
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Rakesh Krishna VS, Rui Zhang, Mohan Kathaperumal, Fuhan Liu, Madhavan Swaminathan, Ali Adibi, "Design and optimization of photonic interconnect for heterogenous integration," Proc. SPIE 11694, Photonic and Phononic Properties of Engineered Nanostructures XI, 1169424 (5 March 2021); https://doi.org/10.1117/12.2590744