Interleaved IIR filter on delta-sigma modulated signals

David M. Lewis

doi:10.1117/12.255461

22 October 1996 Interleaved IIR filter on Δ-Σ modulated signals

David M. Lewis

Proceedings Volume 2846, Advanced Signal Processing Algorithms, Architectures, and Implementations VI; (1996) https://doi.org/10.1117/12.255461
Event: SPIE's 1996 International Symposium on Optical Science, Engineering, and Instrumentation, 1996, Denver, CO, United States

Abstract

This paper describes a circuit implementing 12 fully independent biquad digital filters operating on (Delta) - (Sigma) modulated signals with 28 b resolution. A carry-save adder with partial carry propagation (Delta) -(Sigma) modulator is used together with a pipelined architecture that interleaves all of the filters on a single datapath. Implemented in TSPC logic, the circuit comprises 95 K transistors, including a variable frequency on-chip clock generator.

Citation Download Citation

David M. Lewis "Interleaved IIR filter on Δ-Σ modulated signals", Proc. SPIE 2846, Advanced Signal Processing Algorithms, Architectures, and Implementations VI, (22 October 1996); https://doi.org/10.1117/12.255461

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available