VLSI systems for image compression: a power-consumption/image-resolution trade-off approach

Javier Bracamonte; Michael Ansorge; Fausto Pellandini

doi:10.1117/12.251315

16 September 1996 VLSI systems for image compression: a power-consumption/image-resolution trade-off approach

Javier Bracamonte, Michael Ansorge, Fausto Pellandini

Proceedings Volume 2952, Digital Compression Technologies and Systems for Video Communications; (1996) https://doi.org/10.1117/12.251315
Event: Advanced Imaging and Network Technologies, 1996, Berlin, Germany

Abstract

Low power consumption is a requirement for any battery powered portable equipment. When designing ASICs for image and video compression, emphasis has been placed mainly on building circuits that are fast enough to satisfy the high data throughput associated with image and video processing. The imminent development of portable systems featuring full multimedia applications, adds the low-power constraint to the design of VLSI circuits for this kind of application. Several techniques such as lowering the supply voltage, architectural parallelization, pipelining etc., have been proposed in the literature to achieve low-power consumption. In this paper we report a VLSI circuit featuring a power management user-controllable technique that trades image quality for power consumption in a transform-based algorithm.

Citation Download Citation

Javier Bracamonte, Michael Ansorge, and Fausto Pellandini "VLSI systems for image compression: a power-consumption/image-resolution trade-off approach", Proc. SPIE 2952, Digital Compression Technologies and Systems for Video Communications, (16 September 1996); https://doi.org/10.1117/12.251315

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