Si1-x-yGexCy channel heterojunction PMOSFETs

Soji John; Samit K. Ray; Sandeep K. Oswal; Sanjay K. Banerjee

doi:10.1117/12.284611

27 August 1997 Si_1-x-yGe_xC_y channel heterojunction PMOSFETs

Soji John, Samit K. Ray, Sandeep K. Oswal, Sanjay K. Banerjee

Proceedings Volume 3212, Microelectronic Device Technology; (1997) https://doi.org/10.1117/12.284611
Event: Microelectronic Manufacturing, 1997, Austin, TX, United States

Abstract

Strain-compensated Si_1-x-yGe_xC_y alloy appears attractive because it may eliminate the constraints in Si_{1- x}Ge_x device design involving high Ge concentrations, thicker active layers, and may allow relatively higher process temperature windows. PMOSFET devices were fabricated with partially strained Si_1-x-yGe_xC_y films with Ge-to-C ratio of 30:1 in order to preserve the valence band offset to confine holes. Bulk and epitaxial Si, Si_1-xGe_x and completley strain-compensated Si_1-x-yGe_xC_y were also processed for comparison. An n⁺-poly gate PMOS process was used. The dc characteristics of the Si_{1-x- y}Ge_xC_y PMOSFETs with channel lengths varying from 0.8 to 10 micrometer were evaluated between room temperature and 77 degrees Kelvin and were compared to those of Si and Si_1-xGe_x PMOSFETs. The low field effective mobility in Si_1-x-yGe_xC_y devices were found to be higher than that of Si_1-xGe_x and Si devices at low gate bias and room temperature as a result of partial strain compensation. However, with increasing transverse fields and with decreasing temperatures, Si_1-x-yGe_xC_y, we observed degradation in device performance. This enhancement at low gate bias was attributed to the strain stabilization effect of C. At higher C concentrations, degraded performance was observed. This first application of Si_1-x-yGe_xC_y in PMOSFETs demonstrates potential benefits in the use of C with the column IV heterostructure system.

Citation Download Citation

Soji John, Samit K. Ray, Sandeep K. Oswal, and Sanjay K. Banerjee "Si_1-x-yGe_xC_y channel heterojunction PMOSFETs", Proc. SPIE 3212, Microelectronic Device Technology, (27 August 1997); https://doi.org/10.1117/12.284611

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available