Novel single-chip evolutionary hardware design using FPGAs

Craig G. Slorach; Ken C. Sharman

doi:10.1117/12.327024

8 October 1998 Novel single-chip evolutionary hardware design using FPGAs

Craig G. Slorach, Ken C. Sharman

Proceedings Volume 3526, Configurable Computing: Technology and Applications; (1998) https://doi.org/10.1117/12.327024
Event: Photonics East (ISAM, VVDC, IEMB), 1998, Boston, MA, United States

Abstract

There has recently been much research interest in the concept of evolvable hardware--partly due to the rapid technological changes brought about by reconfigurable devices and partly due to the success of evolutionary techniques in software systems. In this paper we contribute to this effort and present a scalable single chip solution for evolvable hardware. This employs standard off-the-shelf Field Programmable Gate Arrays as opposed to a custom silicon solution. The resulting system permits the automatic evolution of digital circuits to match some given specification and has significant advantages and features over existing design flows. The system employs evolutionary programming as the adaptive design process--however the underlying system architecture is independent of the evolutionary algorithm being employed and so may be changed as required. The system is described in the hardware description language VHDL and hence is portable to other programmable devices satisfying the architectural requirements which are also detailed.

Citation Download Citation

Craig G. Slorach and Ken C. Sharman "Novel single-chip evolutionary hardware design using FPGAs", Proc. SPIE 3526, Configurable Computing: Technology and Applications, (8 October 1998); https://doi.org/10.1117/12.327024

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