Rapid and cost-effective technology development using TCAD: a case study

Adil Shafi; Jim McGinty; Martin Fallon; Mark Redford

doi:10.1117/12.346919

27 April 1999 Rapid and cost-effective technology development using TCAD: a case study

Adil Shafi, Jim McGinty, Martin Fallon, Mark Redford

Proceedings Volume 3743, In-Line Characterization, Yield Reliability, and Failure Analyses in Microelectronic Manufacturing; (1999) https://doi.org/10.1117/12.346919
Event: Microelectronic Manufacturing Technologies, 1999, Edinburgh, United Kingdom

Abstract

Rapid and cost effective technology development is required in order to meet competitive time to market constraints for modern semiconductor products. TCAD tools are indispensable for meeting both time and cost targets by pinpointing the required development effort and thereby reducing the development work required. In this study, the requirement is to increase the substrate breakdown voltages and thereby reducing the development work required. In this study, the requirement is to increase the substrate breakdown voltages of both npn and pnp bipolar transistors for a complimentary vertical bipolar process from 120V to 155V. A design of experiment approach to both device layout and process technology development is used to ensure that both layout and process sensitivities are rigorously considered in designing-in the manufacturability of the technology at the development stage. TCAD tools are used to show that the increased breakdown voltages can be achieved purely by optimizing the device layout. A layout DOE is performed to guarantee that there is no marginality relating to the device layout. Monte Carlo analysis then performed to determine the process steps that the breakdown voltage is most sensitive to. A process DOE is then run to ensure that there is no marginality relating to the process.

Citation Download Citation

Adil Shafi, Jim McGinty, Martin Fallon, and Mark Redford "Rapid and cost-effective technology development using TCAD: a case study", Proc. SPIE 3743, In-Line Characterization, Yield Reliability, and Failure Analyses in Microelectronic Manufacturing, (27 April 1999); https://doi.org/10.1117/12.346919

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