Electrical critical dimension metrology for 100-nm linewidths and below

Andrew Grenville; Brian Coombs; John M. Hutchinson; Kelin J. Kuhn; David Miller; Patrick M. Troccolo

doi:10.1117/12.389034

5 July 2000 Electrical critical dimension metrology for 100-nm linewidths and below

Andrew Grenville, Brian Coombs, John M. Hutchinson, Kelin J. Kuhn, David Miller, Patrick M. Troccolo

Proceedings Volume 4000, Optical Microlithography XIII; (2000) https://doi.org/10.1117/12.389034
Event: Microlithography 2000, 2000, Santa Clara, CA, United States

Abstract

In this paper, we have demonstrated an electrical CD process capable of resolving linewidth swell below 100 nm compatible with a standard polysilicon patterning flow. Appropriate selection of dopant species combined with a reduction in anneal temperature were in the primary means for achieving a physical to electrical linewidth bias of 20 nm. These findings supported our hypothesis that dopant our-diffusion was the primary source of the bias. Also, ECD metrology is applied to quantifying poly CD variations in the presence of substrate topography.

Citation Download Citation

Andrew Grenville, Brian Coombs, John M. Hutchinson, Kelin J. Kuhn, David Miller, and Patrick M. Troccolo "Electrical critical dimension metrology for 100-nm linewidths and below", Proc. SPIE 4000, Optical Microlithography XIII, (5 July 2000); https://doi.org/10.1117/12.389034

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