Paper
24 October 2000 Design of high-speed high-performance, serial bus data transceiver
Saravanan Kumar Kuppusamy, S. M. Rezaul Hasan
Author Affiliations +
Proceedings Volume 4228, Design, Modeling, and Simulation in Microelectronics; (2000) https://doi.org/10.1117/12.405432
Event: International Symposium on Microelectronics and Assembly, 2000, Singapore, Singapore
Abstract
Recent developments in digital data transport shows that the general trend is moving towards high-speed, low-cost serial networks. Standards such as USB and the relatively new IEEE1394, provide inexpensive, scalable and truly universal I/O connection for virtually any form of digital hardware. Bandwidth requirements for multimedia applications such as real-time digital audio and video, digital broadcasting, wide-band ethernet and the emergence of consumer products such as digital camcorders and VCRs makes data rates of up to 400Mbit/s and beyond, a necessity. In this work we have developed a high-speed high-performance serial bus transceiver, which conforms to the IEEE1394 standards. The HP 0.5micrometers scalable CMOS process available through MOSIS was used for the hardware design. Data rates of up to 800Mbit/s are achieve din comparison to previous similar works that only achieves 300Mbit/s using a BiCMOS process.
© (2000) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Saravanan Kumar Kuppusamy and S. M. Rezaul Hasan "Design of high-speed high-performance, serial bus data transceiver", Proc. SPIE 4228, Design, Modeling, and Simulation in Microelectronics, (24 October 2000); https://doi.org/10.1117/12.405432
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KEYWORDS
Transceivers

Clocks

Computer programming

Amplifiers

Analog electronics

Multiplexers

Data communications

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