Validation of the aberration-pattern-matching OPC strategy

Frank E. Gennari; Garth Robins; Andrew R. Neureuther

doi:10.1117/12.475679

12 July 2002 Validation of the aberration-pattern-matching OPC strategy

Frank E. Gennari, Garth Robins, Andrew R. Neureuther

Proceedings Volume 4692, Design, Process Integration, and Characterization for Microelectronics; (2002) https://doi.org/10.1117/12.475679
Event: Design, Process Integration, and Characterization for Microelectronics, 2002, Santa Clara, CA, United States

Abstract

This paper validates the pattern matching methodology for locating and quantifying worst-case aberration-distortion of patterns through the comparison of theoretically predicted and simulated images. The matching process identifies those pattern element that will be most affected by the aberrations specific to the given lens. Once the highly impacted layout structures are identified, the region is extracted and simulated with and without aberrations using SPLAT to observe the induced pattern distortions. It is shown that even for good quality lenses, the resulting line- edge and line-end perturbations of PSM layouts for residual amounts of aberrations can exceed half those of optical proximity effects and may be quantified as additional input into the OPC process. The resulting feature edge shift is large and linear with aberration level for odd aberrations and much smaller for even aberrations whose electric fields add in quadrature. The effects of aberrations on binary marks are about half as large as the effects on phase-shift and phase-edge masks. The goal of the system is to allow measurements of aberrations across the field and among tools to be utilized int eh design process to inform designers of problematic features and to apply appropriate compensation on the mask.

Citation Download Citation

Frank E. Gennari, Garth Robins, and Andrew R. Neureuther "Validation of the aberration-pattern-matching OPC strategy", Proc. SPIE 4692, Design, Process Integration, and Characterization for Microelectronics, (12 July 2002); https://doi.org/10.1117/12.475679

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