Paper
19 May 2010 Schematic-based 4/16/64 order quadrature amplitude modulation mapper-demapper implementation for 256 subchannel orthogonal frequency division multiplexing model on FPGA Xilinx SPARTAN 3E
. Imaduddin, Budi Setiyanto, . Litasari
Author Affiliations +
Proceedings Volume 7743, Southeast Asian International Advances in Micro/Nanotechnology; 77430P (2010) https://doi.org/10.1117/12.863863
Event: Southeast Asian International Advances in Micro/Nano-technology, 2010, Bangkok, Thailand
Abstract
Orthogonal Frequency Division Multiplexing (OFDM) is a modulation technique which provides higher bit rate and efficient bandwidth. This paper presents an implementation of a 4/16/64 Order Quadrature Amplitude Modulation (QAM) Mapper-Demapper for 256 Sub channel OFDM Model on Xilinx SPARTAN 3E Field-Programmable Gate Array (FPGA) series, using schematic approach. This QAMOFDM model is reconfigurable in term of its QAM order. The result shows that under the clock frequency around 262 MHz, the implementation works well, high precision is achieved at its serial output. A precision process conducted at 20 ns internal clock input period, with the 25 Mbps input bit rate requires 81.94 μs QAM processing-time. The implementation consumes about 80 % of the total FPGA slices (3736 slices).
© (2010) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
. Imaduddin, Budi Setiyanto, and . Litasari "Schematic-based 4/16/64 order quadrature amplitude modulation mapper-demapper implementation for 256 subchannel orthogonal frequency division multiplexing model on FPGA Xilinx SPARTAN 3E", Proc. SPIE 7743, Southeast Asian International Advances in Micro/Nanotechnology, 77430P (19 May 2010); https://doi.org/10.1117/12.863863
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KEYWORDS
Quadrature amplitude modulation

Field programmable gate arrays

Orthogonal frequency division multiplexing

Terbium

Clocks

Logic

LCDs

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