Multiple-samples-method enabling high dynamic range imaging for high frame rate CMOS image sensor by FPGA and co-processor

Blake C. Jacquot; Nathan Johnson-Williams

doi:10.1117/12.2062284

19 September 2014 Multiple-samples-method enabling high dynamic range imaging for high frame rate CMOS image sensor by FPGA and co-processor

Blake C. Jacquot, Nathan Johnson-Williams

Author Affiliations +

Proceedings Volume 9216, Optics and Photonics for Information Processing VIII; 921609 (2014) https://doi.org/10.1117/12.2062284
Event: SPIE Optical Engineering + Applications, 2014, San Diego, California, United States

Abstract

We present results from a prototype CMOS camera system implementing a multiple sampled pixel level algorithm (“Last Sample Before Saturation”) to create High-Dynamic Range (HDR) images that approach the dynamic range of CCDs. The system is built around a commercial 1280 × 1024 CMOS image sensor with 10-bits per pixel and up to 500 Hz full frame rate with higher frame rates available through windowing. We analyze imagery data collected at room temperature for SNR versus photocurrent, among other figures of merit. Results conform to expectations of a model that uses only dark current, read noise, and photocurrent as input parameters.

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Blake C. Jacquot and Nathan Johnson-Williams "Multiple-samples-method enabling high dynamic range imaging for high frame rate CMOS image sensor by FPGA and co-processor", Proc. SPIE 9216, Optics and Photonics for Information Processing VIII, 921609 (19 September 2014); https://doi.org/10.1117/12.2062284

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