This guest editorial summarizes the Special Section on Control of Integrated Circuit Patterning Variance, Part 3: Pattern Roughness, Local Uniformity, and Stochastic Defects

This is a historical translation of the seminal paper by W. Schottky, originally published in 1918. Originally published as W. Schottky, “Über spontane Stromschwankungen in verschiedenen Elektrizitätsleitern,” Annalen der Physik 362(23), pp. 541–567 (1918). English translation by Martin Burkhardt with further editing by the translator and Anthony Yen. Permission of translation and publication granted by Wiley.

The term “shot effect” (schroteffekt) was coined in 1918 when Walter Schottky studied electrical noise in vacuum tubes. Earlier still, the foundations of shot noise theory go back to Einstein, who in 1905 explained the photoelectric effect as caused by discrete “particles” of light and Brownian motion as caused by discrete particles of matter. When the numbers of particles that affect observable outcomes are large, shot noise effects (variability in number as a fraction of the mean number) become small, and the continuum approximation (energy and matter are continuous) becomes accurate. For most of the history of semiconductor lithography, the continuum approximation has served well. But at small dimensional scales, where the number of discrete particles or events is small, the counting statistics of shot noise can dominate. The 100-year history of shot noise in science and engineering is today playing a role in our understanding of shot noise in lithography.

Due to the high energy of extreme ultraviolet (EUV) photons, stochastic effects become more important at a constant dose when compared with deep ultraviolet exposures. Photoresists are used to transfer information from the aerial image into physical features and play an important role in the transduction of these stochastic effects. Recently, metal-oxide-based nonchemically amplified resists (non-CARs) have attracted a lot of attention. We study how the properties of these non-CARs impact the local critical dimension uniformity (LCDU) of a regular contact hole array printed with EUV lithography using Monte Carlo simulations and an analytical model. We benchmark both the simulations and the analytical model to experimental data, and then use the flexibility of both methods to systematically investigate the role of microscopic resist properties in the final LCDU. It is found that metal-oxide clusters should be <1  nm in diameter, otherwise granularity will have a significant contribution to LCDU. When varying resist properties to change the resist dose-to-size, we find that the LCDU scaling with dose depends on how the resist is modified. After performing an overall sensitivity analysis to identify the optimum scaling of LCDU with dose, we find a scaling of dose^−  0.5 when the development threshold is modified, and a scaling of dose^{−  0.33} when core radius or the quantum efficiency is changed.

Measurement of line edge roughness (LER) is discussed from four aspects: edge detection, power spectrum densities (PSD) prediction, sampling strategy, and noise mitigation. General guidelines and practical solutions for LER measurement today are introduced. Advanced edge detection algorithms such as the wave-matching method are shown to be effective for robustly detecting edges from low SNR images, whereas a conventional algorithm with weak filtering is still effective in suppressing SEM noise and aliasing. An advanced PSD prediction method such as the multitaper method is effective in suppressing sampling noise within a line edge to analyze, whereas a number of lines are still required for suppressing line-to-line variation. Two types of SEM noise mitigation methods, such as the “apparent noise floor” subtraction method and LER-noise decomposition using regression analysis, are verified to successfully mitigate SEM noise from PSD curves. These results are extended to local critical-dimension uniformity (LCDU) measurement to clarify the impact of SEM noise and sampling noise on LCDU.

At modern manufacturing geometries, roughness control presents a huge challenge for the lithography step. For advanced nodes, this morphological aspect reaches the same order of magnitude as the critical dimension (CD). Hence, the control of roughness needs an adapted metrology. Specific samples with designed roughness have been manufactured using e-beam lithography. These samples have been characterized with three different methodologies: CD-scanning electron microscopy, optical critical dimension, and small angle x-ray scattering. The main goal is to compare the capability of each of these techniques in terms of reliability, type of information obtained, time to obtain the measurements, and level of maturity for the industry. The next step will be to develop a hybrid metrology approach for roughness determination with these techniques.

Pattern roughness is a major problem in advanced lithography for semiconductor manufacturing, especially for the insertion of extreme ultraviolet (EUV) lithography as proposed in the coming years. Current approaches to roughness reduction have not yielded the desired results. Here, a global optimization approach is proposed, taking advantage of the different strengths and weaknesses of lithography and etch. Lithography should focus on low-frequency roughness by minimizing both the low-frequency power spectral density (PSD) and the correlation length. Etch should focus on high frequency roughness by growing the correlation length. By making unbiased measurements of the roughness, including the PSD, the parameters needed to guide these optimization efforts become available. The old approach, of individually seeking to reduce the 3σ roughness of pre- and postetch features, is unlikely to lead to the required progress in overall roughness reduction for EUV.

We present an experimental study of pattern variability and defectivity, based on a large data set with <112 million critical dimension (CD) and via area measurements from a Hermes Microvision Inc. (HMI) high-throughput e-beam tool. The test case is a 10-nm node static random-access memory via array patterned with a deep ultraviolet immersion litho-etch-litho-etch process, where we see a variation in mean size and litho sensitivities between different unique via patterns that leads to significant differences in defectivity. The large data volume made available by high-throughput inspection capability of the HMI eP5 tool enables analysis to reliably distinguish global and local CD uniformity variations, including a breakdown into local systematics and stochastics. From a closer inspection of the tail end of the distributions and estimation of defect probabilities, we conclude that there is a common defect mechanism and defect threshold despite the observed differences of specific pattern characteristics. In addition, we studied wafer fingerprints for both global CD uniformity (GCDU) and local CD uniformity (LCDU), including stochastics. We used LCDU and GCDU wafer maps to identify correlations between those parameters and defect count. We expect that the analysis methodology presented can be applied for defect probability modeling as well as general process qualification in the future.

The relationship between edge placement error (EPE), semiconductor design-rule determination, and predicted yield in the era of EUV lithography is examined, starting with the basics of EPE and then building up to design-rule calculations. The EPE definitions can be used as the building blocks for design-rule equations. Next the concept of “good fields” is explored and used to predict the n-sigma value needed for design-rule determination. Specifically, fundamental yield calculations based on the failure opportunities per chip are used to determine at what n-sigma value design-rules need to be tested to ensure high yield. The “value” can be a space between two features, an intersect area between two features, a minimum area of a feature, etc. It is shown that across-chip variation of design-rule important values needs to be tested at sigma values between seven and eight, which is much higher than the 4-sigma values traditionally used for design-rule determination. After recommending new statistics be used for design-rule calculations, we examine the impact of EUV lithography on sources of variation important for design-rule calculations.

As semiconductor technology keeps moving forward, undeterred by the many challenges ahead, one specific deliverable is capturing the attention of many experts in the field: line width roughness (LWR) specifications are expected to be <2  nm in the near term, and to drop below 1 nm in just a few years. This is a daunting challenge and engineers throughout the industry are trying to meet these targets using every means at their disposal. However, although current efforts are surely admirable, we believe they are not enough. The fact is that a specification has a meaning only if there is an agreed methodology to verify if the criterion is met or not. Such standardization is critical in any field of science and technology and the question that we need to ask ourselves today is whether we have a standardized LWR metrology or not. In other words, if a single reference sample were provided, would everyone measuring it get reasonably comparable results? We came to realize that this is not the case and that the observed spread in the results throughout the industry is quite large. In our opinion, this makes the comparison of LWR data among institutions, or to a specification, very difficult. We report the spread of measured LWR data across the semiconductor industry. We investigate the impact of image acquisition, measurement algorithm, and frequency analysis parameters on LWR metrology. We review critically some of the International Technology Roadmap for Semiconductors (ITRS) metrology guidelines [such as measurement box length <2  μm and the need to correct for scanning electron microscope (SEM) noise]. We compare the SEM roughness results to AFM measurements. Finally, we propose a standardized LWR measurement protocol—the imec roughness protocol—intended to ensure that every time LWR measurements are compared (from various sources or to specifications), the comparison is sensible and sound. We deeply believe that the industry is at a point where it is imperative to guarantee that when talking about a critical parameter such as LWR, everyone speaks the same language, which is not currently the case.

Line edge roughness (LER) and linewidth roughness (LWR) of a semiconductor device are important measures for evaluating its performance. Conventionally, LER and LWR have been evaluated from critical dimension scanning electron microscope (CD-SEM) images. However, the problem with CD-SEM measurement is that the high-frequency image noise is large, and the resolution is not sufficiently high. In order to overcome the problem of image noise in CD-SEM measurement, some techniques have been proposed. In these methods, it is necessary to set the parameters for the model and processing, and it is required to verify the correctness of these parameters using reference metrology. We have already proposed a reference metrology using the focused ion beam process and planar transmission electron microscope (planar-TEM) method. In this study, we apply the proposed method to three new samples, namely self-aligned quadruple patterning fin-shaped field-effect transistor device, extreme ultraviolet lithography (EUV) conventional resist, and EUV new material resist. The LWR and the power spectral density (PSD) of LWR are calculated from the edge positions on planar-TEM images. We confirm that the LWR and the PSD of LWR can be measured with high accuracy and evaluate the difference between PSD by the proposed method and that by CD-SEM images. Furthermore, from comparisons with the PSD of the same sample obtained using CD-SEM, the validity of measurement of PSD and LWR by CD-SEM is verified.

Stochastic effects in lithography are known to be the cause of critical dimension (CD) variability, quantified, e.g., by linewidth roughness or local CD uniformity, but—when the CDs are small—they can also lead to printing failures, and hence have a significant impact on yield. We will focus on these printing failures and review three important topics in this relatively new field. First, we will look at how these failures can be detected and show how either CD-SEM, e-beam inspection, and optical defect inspection can play a useful role. Next, we consider the important question of how the stochastic failure probability (which we quantify by a metric we call “Not OK,” abbreviated NOK) depends on the lithography- and process-settings, a question that is of obvious importance when looking for conditions that will minimize the failure probability and hence maximize the yield. Finally, we will discuss to what extent we can fit experimentally observed failure probabilities, to empirical models. Such models can play a vital role in future OPC-verification flows, where screening full mask layouts for “stochastic hot spots” is expected to become a mandatory step.

As more aggressive EUV imaging techniques and resists with lower intrinsic roughness are developed for patterning at 7- and 5-nm technology nodes, EUV mask roughness will contribute an increasing portion of the total printed line-width roughness (LWR). We perform a comprehensive characterization of the EUV mask impacts on wafer LWR using actinic aerial images and wafer SEM images. Analytical methods are developed to properly separate and compare the LWR effects from EUV masks, photon shot noise, and resist stochastics. The use of EUV AIMS™ to emulate and measure incident photon shot noise effects is explored and demonstrated. A sub 10-nm EUV mask is qualified using EUV AIMS™ with scanner equivalent dose settings that are required for patterning 16- and 18-nm half-pitch L/S features. Typical chemically amplified EUV resists with low- and high-dose sensitivities are patterned and characterized with SEM metrology. The variance and spectral components contributing to wafer LWR are quantified and compared. Our analysis shows that speckle-induced aerial LWR is not a significant factor at the experimental imaging conditions when ML roughness is 50-pm rms. At the current scanner dose levels, mask absorber pattern roughness is a major factor in aerial LWR, but not as significant a contributor to wafer LWR where resist stochastics still dominate.

Vote-taking lithography is a method for mitigating mask defects, which has been applied in the 1980s to enhance yield. Vote-taking sums up N different mask images with identical content, each at 1  /  N dose, to mitigate the defects on each individual mask. The fundamental assumption is that the mask defects do not correlate in position from mask to mask, and so each individual defect will be blended with good images from the other N  −  1 masks. Vote-taking has recently been reconsidered for extreme ultraviolet (EUV) lithography, where it might provide a temporary solution for situations in which the defectivity conditions are not yet meeting expectations. This paper provides a thorough experimental assessment of the implementation of vote-taking and discusses its pro’s and con’s. Based on N  =  4 vote-taking, we demonstrate the capability to mitigate different types of mask defects. We found additional benefits of blending different mask images, distinct from mask defect reduction. Experimental results will be shown that demonstrate improved critical dimension uniformity (CDU), both local CDU and intrafield CDU, reduced overlay errors, and smaller stochastic defect levels. Finally, we perform dedicated throughput calculations based on the qualification performance of ASML’s NXE:3400B scanner. This work must be seen in the light of an open-minded search for options to optimally enable and implement EUV lithography. Although defect-free masks and EUV pellicles are without argument essential for most of the applications, we investigate whether some applications could benefit from vote-taking.

Two fundamental challenges of line edge roughness (LER) metrology are to provide complete and accurate measurement of LER. We focus on recent advances concerning both challenges inspired by mathematical and computational methods. Regarding the challenge of completeness: (a) we elaborate on the multifractal analysis of LER, which decomposes the scaling behavior of edge undulations into a spectrum of fractal dimensions similarly to what a power spectral density (PSD) does in the frequency domain. Emphasis is given on the physical meaning of the multifractal spectrum and its sensitivity to pattern transfer and etching; (b) we present metrics and methods for the quantification of cross-line (interfeature) correlations between the roughness of edges belonging to the same and nearby lines. We will apply these metrics to quantify the correlations in a self-aligned quadruple patterning lithography. Regarding the challenge of accuracy, we present a PSD-based method for a noise-reduced (sometimes called unbiased) LER metrology and validate it through the analysis of synthesized SEM images. Furthermore, the method is extended to the use of the height–height correlation functions to deliver noise-reduced estimation of the correlation length and the roughness exponent of LER.

An error propagation stochastic model is described and used to study the impact of both photon and photoresist material sources of line-width roughness (LWR). Based on typical chemically amplified resist parameters, material sources of LWR are shown to be of equal importance to photon sources. Of the material sources, quencher is shown to be the most important input noise term. The results show that it is not the relative quencher noise that ultimately matters but rather the absolute quencher noise relative to the mean produced acid count. The results also show that chemical yield is critical and that benefiting from increased absorptivity also requires the chemical yield to be maintained.

Power spectral density (PSD) analysis is playing a more critical role in the understanding of line-edge roughness and linewidth roughness (LWR) in a variety of applications across the industry. It is an essential step to get an unbiased LWR estimate, as well as an extremely useful tool for process and material characterization. However, PSD estimates can be affected by both random and systematic artifacts caused by image acquisition and measurement settings, which could irremediably alter its information content. We report on the impact of various setting parameters (smoothing image processing filters, pixel size, and SEM noise levels) on the PSD estimate. We discuss also the use of a PSD analysis tool in a variety of cases. Looking beyond the basic roughness estimate, we use PSD and autocorrelation analysis to characterize resist blur, as well as low and high frequency roughness contents, applying this technique to guide the EUV material stack selection. Our results clearly indicate that, if properly used, PSD methodology is a very sensitive tool to investigate material and process variations.

The reduction of measurement data and the reduction of time required to select the sample plan are essential for the development of an efficient lithography process model. We have discussed the strengths and weaknesses of existing sample plan selection techniques and proposed a locally linear embedding (LLE)-based sample selection technique. The proposed approach significantly reduces the demand for metrology data and improves the modeling turn-around time without sacrificing the model accuracy and stability. The effectiveness of the proposed methodology is verified by modeling pattern transfer process of critical layers in 14- and 22-nm complementary metal–oxide–semiconductor technologies. The experimental results show that among different sample plan selection techniques, the LLE provides a competitive sample plan choice in a single shot without compromising the accuracy.

Controlling the Fresnel zone shape is an effective way to achieve high efficiency imaging in x-ray optics. Despite significant advances toward 10-nm resolution, focusing efficiency remains a big challenge. Particularly, from the angle of e-beam lithography to control the resist profile for shaping the zones, there have been extremely limited reports so far. Our work focuses on optimizing the resist profiles in the outermost zones by a method known as pattern-proximity-effect-correction to even the exposed charge in resist. Our study demonstrates that both zone shape and the duty cycle can be deliberately controlled by lithography conditions. For a 100-nm zone plate in Au, both the aspect ratio as high as 20/1 and the duty cycle from 0.9 to 1.7 have been achieved in this work. Such a controllability enables us to enhance the focusing efficiency through zone shape control in the next effort.

A photoresist with high mechanical and thermal reliability is required for redistribution layer (RDL) formation to improve integration density and realize thinner packaging for semiconductor industries. We report on a photoresist made from a mixture of a carboxyl group containing polyimide–phenol polymer and a slide-ring polymer. The photoresist showed high toughness, low coefficient of thermal expansion, and excellent long-term thermal stability, keeping its lithography properties, such as 8-μm-diameter via-hole having the depth of 15  μm, and 200°C to 220°C low-temperature curability. This resist will help panel-level-package technology by improving its reliability, and also integrate RDL for automotive packaging.

To enable high volume manufacturing with extreme ultraviolet (EUV) lithography, a pellicle membrane is needed to protect the reticle from particles at EUV source powers beyond 250 W. Identifying a membrane with high EUV transmission, mechanical integrity, thermal stability, and chemical resistance to the scanner environment is extremely challenging; yet, these properties are required to realize next-generation EUV pellicle solutions. Free-standing carbon nanotube (CNT) film as an alternative next-generation core pellicle material is proposed. We demonstrate that free-standing CNT films possess very high EUV transmission (up to 99%) and good transmission uniformity (∼0.4  %   half range), mechanical stability (maximum deflection ∼0.08  mm at 2 Pa), thermal stability (no transmission change under greater than 250 W equivalent EUV power in vacuum), and scalability to a full pellicle size (∼15  ×  12  cm²). The capability of the CNT membrane to withstand high EUV power in the presence of H₂ for a limited time is demonstrated. Other CNT membrane properties are presented that are important for the pellicle application: low EUV scattering, low EUV reflectivity, and sufficient transmission to enable through-pellicle inspection with DUV light or electrons. The ability of the CNT film to stop particles is tested. The influence of hydrogen at higher EUV powers and prolonged exposures on the lifetime of the CNT pellicle remains the current research focus. Approaches for coating the free-standing CNT films for protection are discussed.

Background: Defect compensation is one of the enabling techniques for high-volume manufacturing using extreme ultraviolet lithography. Aim: The advanced evolution strategy algorithm based on covariance matrix adaption is applied to compensation optimization to improve the convergence efficiency and algorithm operability. Approach: The advanced algorithm optimizes the solution population by sampling from the self-adapted covariance matrix of mutation distribution. Results: Optimization simulations for three different masks validated the algorithm’s advantage in convergence efficiency and searching ability compared with original differential evolution, evolution strategy, genetic algorithm (GA), and Nelder–Mead simplex method. The advanced algorithm employs fewer user-defined parameters and is proved to be robust to variations of these parameters. Conclusions: The advanced algorithm obtains better results compared with GA for best-focus, through-focus, and complex-pattern optimizations. With the inherent invariance property, appropriate operability, and robustness, we recommend applying this algorithm to other lithography optimization problems.

Extreme ultraviolet (EUV) lithography utilizes photons with 92 eV energy to ionize resists, generate secondary electrons, and enable electron driven reactions that produce acid in chemically amplified photoresists. Efficiently using the available photons is of key importance. To increase photon absorption, sensitizer molecules, containing highly absorbing elements, can be added to photoresist formulations. These sensitizers have gained growing attention in recent years, showing significant sensitivity improvement. Aside from an increasing absorption, adding metal salts into the resist formulation can induce other mechanisms, like higher secondary electron generation or acid yield, or modification of the dissolution rate that also can affect patterning performance. In this work, we used different sensitizers in chemically amplified resists. We measured experimentally the absorption of EUV light, the acid yield, the photoelectron emission, the dissolution rate, and the patterning performance of the resists. Addition of a sensitizer raised the acid yield even though a decrease in film absorbance occurred, suggesting an apparent increase in chemically resonant secondary electrons. While patterning results confirm a significant sensitivity improvement, it was at the cost of roughness degradation at higher sensitizer loading. This is hypothesized by the chemical distribution of the sensitizer in the resist combined with a modification of the dissolution contrast, as observed by dissolution rate monitor measurements.

We have developed inorganic oxalate compounds [PPh₃(CH₂Ph)][M(2,2′-bipyridine)_n(oxalate)_(3-n)] (n=1, 2, 3; M = Co, Fe, Cr) capable of acting as negative-tone extreme ultraviolet (EUV) resists. Two important trends are observed: (1) sensitivity increases with the number of oxalate ligands; (2) Cobalt and iron complexes exhibit greater sensitivity than analogous chromium complexes. Lithographic studies of the most successful compound, [PPh₃(CH₂Ph)][Co(2,2′-bipyridine)(oxalate)₂], show that it can consistently achieve 20 nm h/p lines at doses approaching 30 mJ/cm₂. Infrared, paramagnetic nuclear magnetic resonance, and cyclic voltammetric studies of this compound show that the reaction products of the EUV photochemistry are Co(II)(2,2′-bipyridine)(oxalate) and [PPh₃(CH₂Ph)]₂(oxalate) formed from the decomposition of one of the oxalate ligands into two equivalents each of carbon dioxide and electrons.

With the continuous shrinking of critical dimension, it may require more time and effort to reduce or remove the lithography defects in the development process. Therefore, defect reduction has become one of the most important technical challenges in device mass production. With the purpose of finding an optimizing recipe, we can simulate group parameters, including nitrogen gas dispensation and wafer-rotation speed. From previous studies, we have established a model based on viscous fluid dynamics and have calculated the removing force distribution across the 300-mm-diameter wafer for the defect residual. In this model, we assumed that the defects mostly are polymer residual; once the removing force reached a certain threshold level (1  ×  ^{10  −  14}  N), the defect with a “centered-ring-like” signature could be removed. For illustration, several groups of optimal parameter under postdeveloping rinse process conditions are given. The numerical simulations represent several recipes in the development process. We find that we can reproduce a group of the total force curves. From the simulation, we could find that we can get the minimally required strength from the three parameters for defect removal. We have done some experiments to validate the simulation results. The experimental data are almost in agreement with the simulation data. Therefore, the above simulation results have verified the effectiveness and validity of the proposed optimization methodology, and it also has shown that the trend of parameters provided by the optimized method has the potential to be an efficient candidate for reducing or removing lithography defects in the development process.

One type of atomic force microscopy (AFM) used for critical dimension (CD) metrology is commonly referred to as CD-AFM; it uses flared tips and two-dimensional (2-D) surface sensing to enable scanning of features with near-vertical sidewalls. An important consideration in this type of CD-AFM metrology is the calibration uncertainty of the tip width (TW). Standards for traceable TW calibration have thus been developed both by National Metrology Institutes and commercial suppliers. The National Institute of Standards and Technology has previously reported the implementation of a self-consistency TW calibration using three CD-AFM tips to image each other. The results of this method were shown to be consistent with prior calibrations based on transmission electron microscope cross sections. The extension of this method to tips &lt;50  nm is demonstrated, as well as the extension of the method to include a second lateral axis.

Optimizing the extraction of information from x-ray measurements while minimizing exposure time is an important area of research in a variety of fields. The semiconductor industry is reaching a point where the traditional optical metrologies need to be augmented in order to better resolve the critical dimensions of structures with feature sizes below 10 nm. Critical dimension small angle x-ray scattering (CDSAXS) is one measurement technique that is capable of characterizing detailed features of periodic nanostructures. As currently implemented, the measurement utilizes the combined scattering from up to 60 different angles. Reducing the number of angles would dramatically improve the feasibility of CDSAXS for implementation in a fabrication setting, but currently there are no clear guidelines as to which angles provide the most information to minimize the uncertainty in the shape of the target structure while maximizing the throughput. In order to develop guidelines for optimizing the angle selection, simulation studies were conducted on a wide variety of structures with subsets of the full angular range to identify which angles minimized the overall shape uncertainty. Analyzing sets of two angle pairs (including all combinations between 0 deg and 60 deg) provides guidance on which angles best constrain the samples. For select samples, higher numbers of angles were included to explore the impact of additional information on the model uncertainty. In general, low angles (&lt;3  deg) best contributed to minimizing the line-width uncertainty, while higher angles near high curvature regions of the scattering profile best constrained the height of the structure. The minimum uncertainty was generally achieved with combinations of the two. This simulation approach can be used to minimize the number of angles measured on real samples and significantly reduce the measurement time.

Background: The multilayer gratings are considered as the potential length-standard-traceable lateral scales for calibrating the next-generation critical dimension scanning electron microscope (CD-SEM) magnification. As a key step in the fabrication of multilayer gratings, selective wet etching determines the final grating structure formation. However, the effects of the etching process parameters on the multilayer gratings in several nanometer scales have not been reported in detail. Aim: By optimizing the process of selective wet etching, we should fabricate high-aspect-ratio and uniform multilayer gratings to obtain high-contrast secondary electron signals and stable secondary electron images while also obtaining measurement accuracy from the small line edge roughness. Approach: Based on the analysis of the important factors in the etching process and SEM and TEM measurement results, we evaluate the effects of ultrasonic agitation, HF acid concentration, etch time, and linewidth scale on the aspect-ratio and uniform of multilayer gratings. Results: We recommend to etching the multilayer films with an HF acid concentration of about 2% during the ultrasonic agitation for uniformity. Moreover, selective wet etching reaction is limited by scale when the linewidth is below 20 nm. Despite the fact that the grating structure is fragile and easy to be broken down, for linewidths of about 10 and 5 nm, the aspect ratio of multilayer gratings can reach about 3 and 2, respectively. Conclusions: By focusing on the optimum conditions of ultrasonic agitation, HF acid concentration, and linewidth scale in the selective wet etching, selective wet etching can be used to fabricate high-aspect-ratio and uniform multilayer gratings with linewidth below 20 nm.

We present an overlay measurement method that is designed to use scanning electron microscope (SEM) images taken in the circuit pattern region. In the semiconductor manufacturing, the overlay is currently measured using target patterns fabricated in the scribe line region. However, there are residual errors between the measurement values in the scribe line region and the actual values in the circuit pattern region. Therefore, in-die overlay accuracy measurements using circuit patterns are required for precise overlay control. We have developed an in-die overlay accuracy measurement method based on SEM images. The overlay is directly measured by comparing a golden image and a test image captured in the circuit pattern region. Each layer is automatically recognized from the images by utilizing a “graph cut” technique, and the placement error between the two images is determined and used to calculate the overlay accuracy. This enables us to measure the overlay accuracy without specially designed target patterns or the setting up of measurement cursors. In the numerical experiments using pseudoimages, the proposed method has linearity and sensitivity for the subpixel-order overlay even if the patterns have size variations. The basic performance of this method was evaluated using real SEM images. A measurement repeatability of less than 1.35 nm (0.36 pixel) was achieved, and a reasonable wafer map of the overlay was obtained.

The presence of dielectric charging in a switch causes stiction and drift in pull-in voltage. A design to alleviate charging issues for RF MEMS switches is proposed. An RF MEMS capacitive switch has been fabricated and characterized. Measured pull-in of the switch is &lt;20  V and pull-up voltage is 17 V with a switching time of 78  μs. Insertion loss and isolation of the switch are measured by varying RF power from 0 to 15 dBm at room temperature. Insertion loss and isolation of the switch are better than 0.1 and 17 dB, respectively. Resonant frequency of the device is 8.4 kHz. The switch has completed 600 million cycles.