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This idea was advanced to account for pinching and bridging print contour constraints in the paper "Controlling Bridging and Pinching with Pixel-based Mask for Inverse Lithograph'' by S. Kobelkov and others in 2015.
The present paper extends this approach further for solving the enclosure print image constraints, getting maximum common depth of focus, and obtaining uniform PV-bands.
Namely, we suggest several objective functions that express penalty for constraint violations. Their minimization with gradient descent methods is considered. A number of applications have been tested with ILTbased pxOPC tool for DUV metal, contacts, and EUV metal layouts; results are discussed showing benefits of each approach.
EUV has 13.5nm as its wavelength, which is much smaller than the wavelength used in ArF lithography, and this gives very different imaging challenges compared to the ArF case. Due to the small wavelength and numerical aperture (NA) of the current EUV tools, depth of focus is not as significant of a concern as in DUV. Instead, EUV lithography is severely challenged by stochastic effects, which are directly linked to the slope of the intensity curve. DUV SRAF has been shown to be a powerful tool for improving NILS/ILS, as well as DOF, and here we explore how that translates into EUV imaging. In this paper, we consider Process Variability (PV) Bands with a variety of process conditions including focus/dose/mask bias changes and also the NILS/ILS as our objective functions, to determine what the best SRAF solution is for a set of test patterns. We have full investigations on both symmetric SRAF and asymmetric SRAF.
SRAF can potentially mitigate image shift through focus, i.e. non-telecentricity, caused by EUV 3D shadowing effect. This shadowing effect is pattern dependent and contributes to the overlay variation. As we approach the next generation beyond 7nm node, this image shift can be more significant relative to the overlay budget, hence we further investigate the impact of SRAF placement to the image shift. Moreover, the Center of Focus shift due to the large 3D mask absorber thickness can be potentially mitigated by SRAF implementation. The common process window is significantly impacted by both the center of focus shift and the individual depth of focus. We study the change by adding SRAF using both a symmetric source (standard source) and an asymmetric source (SMO source). Once SRAF is inserted for the test patterns, the common process window is plotted to compare the solutions with and without SRAF.
Finally, we understand the importance of using full flare map and full through slit model (including aberration variation through slit) in the main feature correction, but in this paper, we will further evaluate the need of using full models in SRAF insertion. This is a necessary step to determine the strategy of SRAF implementation for the next generation beyond 7nm node.
In this paper, we present two different Optical Proximity Correction (OPC) flows for Si-Photonics patterning. The first flow is regular model based OPC and the second one is based on Inverse Lithography Technology (ILT). The first OPC flow needs first to retarget the input layout while the ILT flow does support skew edges input by tool design and does not need any retargeting step before OPC. We will compare these two flows on various Si- Photonics waveguides from lithography quality, run time and MRC compliance of mask output. We will observe that ILT flow gives the best Edge Placement Error (EPE) and the lowest ripples along the devices. The ILT flow also takes into account the mask rules so that the generated mask is mask rule compliant (MRC). We will also discuss the silicon wafer data where Si-Photonics devices are printed within the two different OPC flows at process window conditions. Finally, for both OPC flows, we will present the total OPC run time which is acceptable in an industrial environment.
An approach to solving the inverse lithography problem as a nonlinear, constrained minimization problem over a domain mask pixels was suggested in the paper by Y. Granik “Fast pixel-based mask optimization for inverse lithography” in 2006. The present paper extends this method to satisfy bridging and pinching constraints imposed on print contours.
Namely, there are suggested objective functions expressing penalty for constraints violations, and their minimization with gradient descent methods is considered. This approach has been tested with an ILT-based Local Printability Enhancement (LPTM) tool in an automated flow to eliminate hotspots that can be present on the full chip after conventional SRAF placement/OPC and has been applied in 14nm, 10nm node production, single and multiple-patterning flows.
Earlier work has been done on double exposures that exposed in the same resist a horizontal grating with x-dipoles and subsequently a vertical grating with y dipoles, without intermediate process steps. This yielded a high contrast image in resist at k1 <0.3.1 We show that an equivalent result can be achieved in a single exposure with a single mask, at admittedly high dose. We investigate the process parameters and the related mask tolerances, and find a non-intuitive result for the mask pattern that yields an optimized image at given mask specifications. Finally, we investigate the extension of this technique to EUV through simulations and experiments.
In this paper we present a hybrid OPC solution based on local ILT usage around hot spots. It is named as Local Printability Enhancement (LPE) flow. First, conventional OPC and SRAF placement is applied on the whole design. Then, we apply LPE solution only on the remaining problematic hot spots of the design. The LPE flow also takes into account the mask rules so that it maintains the mask rule check (MRC) compliance through the borders of the repaired hot spot’s areas. We will demonstrate that the LPE flow enlarges the process window around hot spots and gives better lithography quality than baseline. The simulation results are confirmed on silicon wafer where all the hot spots are printed. We will demonstrate that LPE flow enlarges the depth of focus of the most challenging hot spot by 30nm compared to POR conventional solution. Because the proposed flow applies ILT solution on very local hot spot areas, the total OPC run time remains acceptable from manufacturing side.
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