Hardware-in-the-Loop (HWIL) simulation is becoming increasingly important for cost-effective testing of imaging
infrared systems. DSTO is developing real-time scene generation and image processing capabilities within its HWIL
simulation programs, based on the application of COTS desktop PCs equipped with Graphics Processing Unit (GPU)
cards, and including limited use of Field Programmable Gate Arrays (FPGAs). GPUs and FPGAs are high-performance
parallel computing machines but are fundamentally different types of hardware. To determine which hardware type
should be used to implement a real-time solution of a given application, a methodology is required to expose the
concurrency within the problem and to structure the problem in a way that can be mapped to the hardware types. In this
paper we use parallel programming patterns to compare the architectures of recent generation GPUs and FPGAs. We
demonstrate the decomposition of a parallel application and its implementation on GPU and FPGA hardware and present
preliminary results.
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