Integrated tunable lasers based on the co-integration of InP-based SOAs with low-loss Si3N4 dielectric waveguides have emerged as promising solutions in applications where the control of light phase is fundamental. Μicrowave photonics, coherent communications and LIDARs are only some of the applications where sub-KHz linewidths have already been achieved. Nevertheless, the majority of these demonstrations are based on Si3N4 platforms featuring thicknesses lower than 300nm and providing modes with effective indices below 1.6 imposing a major restriction on the achievable FSR values and devices’ footprint. In this work, we present the design of Vernier ring-inspired reflectors based on an 800nm- thick Si3N4 platform providing a TE fundamental mode with an effective index close to 1.71 for a width of 800nm, a group index close to 2.08 at λ=1550nm wavelength, and propagation losses as low as 0.2dB/cm. The proposed thick- Si3N4 designs are based on a simple dual ring Vernier configuration achieving an experimental FSR near 38nm and a 15dB side-mode suppression. These results are in close agreement with the ones obtained theoretically through a detailed Transfer Matrix Formulation verifying the accuracy of the presented semi-analytical model. This simulation model is then employed for the prediction of the performance of more advanced structures such as triple cascaded and high-order Vernier Ring designs, towards extending the achievable FSR and SMSR metrics.
In this work, we present the design process and experimental evaluation of a 1×2 asymmetric power splitters based on the self-imaging principle that is applied on an ultra-low-loss 800nm thick Si3N4 platform. The asymmetry in the multimode interference region is induced by removing a rectangular piece from the edge of the coupler, prompting a disruption at the interference pattern and adjusting accordingly the splitting power ratio. The design of the MMIs operating in the 1500- 1600nm wavelength region was realized through 3D-FDTD calculation method and the experimental results agree with theory providing an error of 5% in splitting ratio and less than -0.6dB insertion losses.
Optical refractive index (RI) sensors exploiting selective co-integration of plasmonics with silicon photonics in Lab-on-achip configurations are expected to disrupt Point-of-Care (POC) diagnostics, delivering performance and economic breakthroughs. Propagating surface-plasmon-polariton modes offer superior sensitivity due to their extreme overlap with the surrounding medium. In parallel, low-loss photonics act as the hosting platform with which the plasmonic losses can be sustained while allowing for multiplexed layouts via in-plane SPP excitation schemes. However, merging plasmonics with silicon photonics in a cost-effective manner, requires a truly CMOS-compatible manufacturing process. Herein, we demonstrate experimentally, the highest bulk-sensitivity among all the plasmo-photonic interferometric RI sensors, while taking the leap forward in the development of a CMOS-manufactured plasmo-photonic sensing platform merging Si3N4 photonics and aluminum plasmonics. The proposed structure relies on a butt-coupled interface between Si3N4 waveguides and a 70 μm long plasmonic stripe, deployed in one branch of a Mach-Zehnder Interferometer (MZI) serving as the sensing transducer that detects local changes in the refractive index. The lower MZI arm (reference arm) exploits the low-loss Si3N4 platform to deploy a MZI-based variable optical attenuator followed by a thermo-optic phase shifter to optimize the sensor performance achieving resonance extinction ratio values at the MZI output of more than 35 dB. Experimental evaluation of a gold-based sensor revealed a bulk refractive index sensitivity of 1930 nm/RIU. In addition, we experimentally demonstrate that the proposed plasmo-photonic waveguide platform can migrate from gold (Au) to Aluminum (Al), demonstrating the first step towards a fully CMOS compatible plasmo-photonic interferometric sensor.
The integration of optical sources in Si photonic transceivers has relied so far on externally coupled III-V laser dies within the assembly. These hybrid approaches are however complex and expensive, as there are additional cost-increasing factors coming from the redundant testing of the pre- and post-coupled laser photonic chips. Further optimization of Photonic Integrated Circuits (PICs) cost and performance can be obtained only with radical technology advancements, such as the “holy grail” of Silicon Photonics; the monolithic integration of III-V sources on Si substrates. MOICANA project funded by EU Horizon 2020 framework targets to develop the technological background for the epitaxy of InP Quantum Dots directly on Si by Selective Area Growth with the best-in-class, in terms of losses and temperature sensitivity, in a CMOS fab, i.e. the SiN waveguide technology. In addition, MOICANA will develop the necessary interface for the seamless light transition between the III-V active and the SiN passive part of the circuitry featuring advanced multiplexing functionality and a combination of efficient and broadband fiber coupling. Through this unique platform, MOICANA aims to demonstrate low cost, inherent cooler-less and energy efficient transmitters, attributes stemming directly from the low loss SiN waveguide technology and the QD nature of the laser’s active region. MOICANA is targeting to exploit the advantages of the monolithic integrated PICs for the demonstration of large volume single-channel and WDM transmitter modules for data center interconnects, 5G mobile fronthaul and coherent communication applications.
Silicon photonics technology has demonstrated, over the years, Photonic Integrated Circuits (PICs) relying on Si or Si3N4 materials that feature advanced functionalities for a wide area of applications. However, the fabrication of such PICs is usually compatible only with Front-End-of-Line (FEOL) processes that render very difficult post processing of the involved chips towards providing efficient interfaces with optical sources. This is a major problem for the next generation photonic circuits that are expected to co-integrate III-V laser sources on the Si substrate in a monolithic way, as the coupling interface between the active and the passive part of the PIC should be developed after the epitaxy and the fabrication of the lasers. In this work, we report on the development of a novel Silicon Rich Nitride (SRN) material with low stress and high refractive index (n<3.16), close to that of InP and InGaAsP which are commonly utilized for the laser sources. The SRN has been characterized with spectroscopic ellipsometry and Fourier-Transform Infrared Spectroscopy for estimation of complex refractive index and hydrogen content in the film. Based on this material, a trilayer stack has been developed for the formation of waveguides compatible with the Back-End-of-Line (BEOL) processes, while propagation losses have been extracted through cut-back measurements. These experimental results were then inserted as input parameters in 2D- and 3D-FDTD simulations for the design of efficient interfaces between III-V lasers and Si3N4 waveguides providing coupling efficiencies that can reach 83.81% and back-reflections of 0.032%.
Silicon photonics technology has emerged as a viable solution for the demonstration of highly functional Photonic Integrated Circuits (PICs) relying on the mixture of light sources with silicon based waveguides. However, the incorporation of the laser sources in all PICs has always been at the center of industrial and research attention. To date, the vast majority of such merging schemes focus on either flip chip bonding of external III-V dies or hybrid-integration techniques that feature very good optical performance at the expense of fabrication cost. The next evolution of PICs, however will rely on the monolithic integration of the III-V lasers on the silicon substrates for simultaneous optimization of cost and circuit performance. In this work two low-loss coupling interface schemes are presented for efficient light transition between monolithically integrated InP-based laser sources and a Si3N4 passive circuitry through an intermediate waveguiding layer. For both coupling interface schemes, the light is butt-coupled from the III-V source into an intermediate waveguide that in turn couples the light into the final Si3N4 waveguide platform utilizing an evanescent coupling scheme. Two approaches are investigated towards this direction: The first approach is based on a purely stoichiometric Si3N4 waveguide, while the second one is based on a Si-Rich Nitride (SRN) acting as the intermediate layer. In both cases 2D-FDTD simulations verified by 3D-FDTD simulation results reveal total transition losses of less than 1.7dB for the pure-Si3N4 and less than 1dB for the SRN approach.
Publisher’s Note: This conference presentation, originally published on 14 December 2017, was withdrawn per author request
Silicon photonics meet most fabrication requirements of standard CMOS process lines encompassing the photonics-electronics consolidation vision. Despite this remarkable progress, further miniaturization of PICs for common integration with electronics and for increasing PIC functional density is bounded by the inherent diffraction limit of light imposed by optical waveguides. Instead, Surface Plasmon Polariton (SPP) waveguides can guide light at sub-wavelength scales at the metal surface providing unique light-matter interaction properties, exploiting at the same time their metallic nature to naturally integrate with electronics in high-performance ASPICs.
In this article, we demonstrate the main goals of the recently introduced H2020 project PlasmoFab towards addressing the ever increasing needs for low energy, small size and high performance mass manufactured PICs by developing a revolutionary yet CMOS-compatible fabrication platform for seamless co-integration of plasmonics with photonic and supporting electronic. We demonstrate recent advances on the hosting SiN photonic hosting platform reporting on low-loss passive SiN waveguide and Grating Coupler circuits for both the TM and TE polarization states. We also present experimental results of plasmonic gold thin-film and hybrid slot waveguide configurations that can allow for high-sensitivity sensing, providing also the ongoing activities towards replacing gold with Cu, Al or TiN metal in order to yield the same functionality over a CMOS metallic structure. Finally, the first experimental results on the co-integrated SiN+plasmonic platform are demonstrated, concluding to an initial theoretical performance analysis of the CMOS plasmo-photonic biosensor that has the potential to allow for sensitivities beyond 150000nm/RIU.
Bringing photonics and electronics into a common integration platform can unleash unprecedented performance capabilities in data communication and sensing applications. Plasmonics were proposed as the key technology that can merge ultra-fast photonics and low-dimension electronics due to their metallic nature and their unique ability to guide light at sub-wavelength scales. However, inherent high losses of plasmonics in conjunction with the use of CMOS incompatible metals like gold and silver which are broadly utilized in plasmonic applications impede their broad utilization in Photonic Integrated Circuits (PICs). To overcome those limitations and fully exploit the profound benefits of plasmonics, they have to be developed along two technology directives. 1) Selectively co-integrate nanoscale plasmonics with low-loss photonics and 2) replace noble metals with alternative CMOS-compatible counterparts accelerating volume manufacturing of plasmo-photonic ICs. In this context, a hybrid plasmo-photonic structure utilizing the CMOS-compatible metals Aluminum (Al) and Copper (Cu) is proposed to efficiently transfer light between a low-loss Si3N4 photonic waveguide and a hybrid plasmonic slot waveguide. Specifically, a Si3N4 strip waveguide (photonic part) is located below a metallic slot (plasmonic part) forming a hybrid structure. This configuration, if properly designed, can support modes that exhibit quasi even or odd symmetry allowing power exchange between the two parts. According to 3D FDTD simulations, the proposed directional coupling scheme can achieve coupling efficiencies at 1550nm up to 60% and 74% in the case of Al and Cu respectively within a coupling length of just several microns.
Plasmonic technology has attracted intense research interest enhancing the functional portfolio of photonic integrated circuits (PICs) by providing Surface-Plasmon-Polariton (SPP) modes with ultra-high confinement at sub-wavelength scale dimensions and as such increased light matter interaction. However, in most cases plasmonic waveguides rely mainly on noble metals and exhibit high optical losses, impeding their employment in CMOS processes and their practical deployment in highly useful PICs. Hence, merging CMOS compatible plasmonic waveguides with low-loss photonics by judiciously interfacing these two waveguide platforms appears as the most promising route towards the rapid and costefficient manufacturing of high-performance plasmo-photonic integrated circuits. In this work, we present butt-coupled plasmo-photonic interfaces between CMOS compatible 7μm-wide Aluminum (Al) and Copper (Cu) metal stripes and 360×800nm Si3N4 waveguides. The interfaces have been designed by means of 3D FDTD and have been optimized for aqueous environment targeting their future employment in biosensing interferometric arrangements, with the photonic waveguides being cladded with 660nm of Low Temperature Oxide (LTO) and the plasmonic stripes being recessed in a cavity formed between the photonic waveguides. The geometrical parameters of the interface will be presented based on detailed simulation results, using experimentally verified plasmonic properties for the employed CMOS metals. Numerical simulations dictated a coupling efficiency of 53% and 68% at 1.55μm wavelength for Al and Cu, respectively, with the plasmonic propagation length Lspp equaling 66μm for Al and 75μm for Cu with water considered as the top cladding. The proposed interface configuration is currently being fabricated for experimental verification.
Plasmonic technology has emerged as the most promising candidate to revolutionize future photonic-integrated-circuits (PICs) and deliver performance breakthroughs in diverse application areas by providing increased light-matter interaction at the nanometer scale, overcoming the diffraction limit. However, high insertion losses of plasmonic devices impede their practical deployment in PICs. To overcome this hurdle, selective integration of individual plasmonic devices on low-loss photonic platforms is considered, allowing for enhanced chip-scale functionalities with realistic power budgets. In this context, highly-efficient and fabrication-tolerant optical interfaces for co-planar plasmonic and photonic waveguides become essential, bridging these two “worlds” and ease combined high-volume manufacturing. Herein, a TM-mode butt-coupled interface for stoichiometric Si3N4 and Au-based thin-film plasmonic waveguides is proposed aiming to be utilized for bio-sensing applications. Following a systematic design process, this new configuration has been analyzed through 3D FDTD numerical simulations demonstrating coupling efficiencies up to 64% at the wavelength of 1.55 μm, with increased fabrication tolerance compared to silicon based waveguide alternatives.
Slot-based plasmonic waveguides have attracted significant attention owing to their unique ability to confine light within nanometer-scale. In this context, enhanced localized light-matter interaction and control have been exploited to demonstrate novel concepts in data communication and sensing applications revealing the immense potential of plasmonic slot waveguides. However, inherent light absorption in the metallic parts included is such structures hampers the scaling of plasmonic devices and limits their application diversity. A promising solution of such issues is the use of hybrid plasmo-photonic configurations. Hybrid slot waveguides have been introduced as the means to reduce such propagation losses while maintaining their functional advantages. In addition, their co-integration with low-loss photonic waveguides can enable the development of more complex structures with acceptable overall losses. In such scenario, light needs to be efficiently transferred from the photonic to the plasmonic components and/or backwards. Based on this rationale, in this work a hybrid slot-based structure is adopted to achieve highly efficient light transfer between photonic and plasmonic slot waveguides in the near-infrared spectrum region (λ=1550 nm). This transition is realized with the aid of a directional coupling scheme. For this purpose, a Si3N4 bus waveguide (photonic branch) is located below an Aubased metallic slot (plasmonic branch) forming a hybrid waveguide element. The combined configuration, as it is shown with the aid of numerical simulations , is capable of supporting two hybrid guided modes with quasi-even and odd symmetry allowing the development of a power exchange mechanism between the two branches. In this context, a new directional coupling structure has been designed which can achieve power transmission per transition over 68% within a coupling length of the order of just several microns.
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