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Jaska Paaso
at VTT Technical Research Ctr. of Finland Ltd.
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Publications (1)
Proceedings Article | 12 March 2024 Presentation
Chip-scale hermetic packaging of Si PIC with high-speed electronics and photonics
Mikko Karppinen, Mikko Harjanne, Noora Heinilehto, Jae-Wung Lee, Jyrki Ollila, Jaska Paaso
Proceedings Volume PC12892, PC1289205 (2024) https://doi.org/10.1117/12.3006559
KEYWORDS: Packaging, Wafer-level optics, Ceramics, Interfaces, Silicon, Semiconductor lasers, Photonics, Integrated optics, Photonic integrated circuits, High speed electronics
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