CONFERENCE PROCEEDINGS
Advanced Search
Jaska Paaso
at VTT Technical Research Ctr. of Finland Ltd.
SPIE Involvement:
Author
Publications (1)
Proceedings Article | 12 March 2024 Presentation
Chip-scale hermetic packaging of Si PIC with high-speed electronics and photonics
Mikko Karppinen, Mikko Harjanne, Noora Heinilehto, Jae-Wung Lee, Jyrki Ollila, Jaska Paaso
Proceedings Volume PC12892, PC1289205 (2024) https://doi.org/10.1117/12.3006559
KEYWORDS: Photonic integrated circuits, Packaging, Silicon, Photonics, Interfaces, High speed electronics, Ceramics, Integrated optics, Semiconductor lasers, Wafer-level optics
SIGN IN TO:
  • View contact details
UPDATE YOUR PROFILE
Is this your profile? Update it now.
Sign into your SPIE.org account
Don’t have a profile and want one?
Create an account on SPIE.org
Advertisement
Advertisement
Back to Top