A hybrid integrated single-wavelength laser with silicon micro-ring reflector is demonstrated theoretically and
experimentally. It consists of a heterogeneously integrated III-V section for optical gain, an adiabatic taper for light
coupling, and a silicon micro-ring reflector for both wavelength selection and light reflection. Heterogeneous integration
processes for multiple III-V chips bonded to an 8-inch Si wafer have been developed, which is promising for massive
production of hybrid lasers on Si. The III-V layer is introduced on top of a 220-nm thick SOI layer through low-temperature
wafer-boning technology. The optical coupling efficiency of >85% between III-V and Si waveguide has
been achieved. The silicon micro-ring reflector, as the key element of the hybrid laser, is studied, with its maximized
reflectivity of 85.6% demonstrated experimentally. The compact single-wavelength laser enables fully monolithic
integration on silicon wafer for optical communication and optical sensing application.
We demonstrate electrically-pumped III-V quantum-well lasers bonded on SiO2 with a metal-coated etched-mirror. The metal-coated etched-mirror allow the lasers to be used as on-chip laser, but our process design make sure that it requires no additional fabrication step to fabricate the metal-coated etched mirror. The bonded III-V on SiO2 also permits tight laser mode confinement in the active region due to high index contrast between III-V and SiO2. Moreover, it promises a flexible choice of host substrate, in which the silicon substrate could also be replaced with other materials. The laser devices demonstrated have the lowest threshold of 50 mA, a maximum output power of 9 mW and a differential quantum efficiency of 27.6%.
A new heterogeneously integrated III-V/Si laser structure is reported in this letter, which consists of a III-V
ridge waveguide gain section on silicon, III-V/Si optical vertical interconnect accesses (VIAs) and silicon-oninsulator
(SOI) nanophotonic waveguide sections. The III-V semiconductor layers are introduced on top of the 300
nm thick SOI layer through low temperature, plasma assisted direct wafer-bonding and etched to form III-V ridge
waveguide on silicon as the gain section. The optical VIA is formed by tapering the III-V and the beneath SOI in
the same direction with a length of 50 μm for efficient coupling of light down to the 600 nm wide silicon
nanophotonic waveguide or vice versa. Fabrication details and specification characterizations of this heterogeneous
III-V/Si Fabry–Pérot (FP) laser are given. The fabricated FP laser shows a continuous-wave lasing with a threshold
current of 65 mA at room temperature and the slope efficiency from single facet is 144 mW/A. The maximal single
facet emitting power is about 4.5 mW at a current of 100 mA and the side-mode suppression ratio is ~30 dB. This
new heterogeneously integrated III-V/Si laser structure demonstrated enables more complex laser configuration
with a sub-system on-chip for various applications.
As the basic building block for photonic device integration, silicon nanophotonic waveguide requires low-loss
propagation for high-performance ultra-compact photonic device. We experimentally study SiO2 grown by two different
methods (thermal oxidation and PECVD) as hard masks for Si nano-waveguides fabrication and study their effects on
propagation loss. It was found that the denser and smoother quality of thermally grown SiO2 will increase the etch
selectivity of Si and reduce the line-edge roughness transferred to the Si nanowaveguide sidewall, hence giving a lower
loss compared to having PECVD SiO2 hard mask. With thermally grown SiO2 as hard mask, the Si nano-waveguides
loss can have a loss reduction as high as 5.5 times for a 650 nm wide nanowaveguide. Using thermally grown SiO2 as
hard mask will allow the Si nano-waveguide to have as low a propagation loss as direct resist mask and enable III-V
semiconductor on silicon via bonding for multifunctional photonic system on chip.
An on-chip light source plays a determinant role in the realization of integrated photonic chips for optical
interconnects technology. Several integration schemes of III/V laser on SOI platform for on-chip laser application
have been proposed and demonstrated. However, most of those integration approaches do not provide effective
solutions for the following two problems: effective light confinement/amplification in the III/V active region; and
efficient light transfer/coupling between silicon and III/V waveguide. In this paper, a novel approach to integrate
an ultra-compact Lateral-Current-Injection (LCI) laser on silicon-on-insulator (SOI) platform by direct wafer
bonding technique is proposed and designed. The proposed LCI device has an ultra-thin thickness of 270 nm which
is ~10 times thinner than the vertical current injection laser bonded on silicon. It has a confinement factor in the
active region larger than 40% for 1 μm wide III/V active waveguide, which is the highest among all the other
integration schemes proposed so far. An optical vertical interconnect access to transfer light efficiently between
III/V and silicon layer is designed. The design of the shortest “Optical Via” of 4 μm which gives ~100% coupling
efficiency is presented.
Silicon nanophotonic platform based on a silicon-on-insulator substrate enables dense photonic integration due to transparency for light propagation and ultra-high refractive index contrast for light confinement. Here, we integrate silicon together with III-V for high-efficiency heterogeneous Silicon/III-V and short vertical optical interconnect access. The fabrication involves 3 critical processes: 1) obtaining more than 80% maximum bonded areas of Si with III-V, 2) precise alignment of III-V nano-devices on top of the passive devices and 3) vertical sidewall etch profile of Si and III-V devices. The measurement results show around 90% coupling efficiency. The realization of this heterogeneous Si/III-V integration platform will open up enormous opportunities for photonic system on silicon through integrating various devices.
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