Mr. Joshua S. Hooge Profile

Joshua S. Hooge

Principal Research Scientist at Tokyo Electron America Inc

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Author

Publications (11)

SPIE Journal Paper | 10 July 2012

Frequency multiplication of lamellar phase block copolymers with grapho-epitaxy directed self-assembly sensitivity to prepattern

Roel Gronheid, Paulina Rincon Delgadillo, Ivan Pollentier, Paul Nealey, Todd Younkin, Mark Somervell, Joshua Hooge, Kathleen Nafus

JM3, Vol. 11, Issue 3, 031303, (July 2012) https://doi.org/10.1117/12.10.1117/1.JMM.11.3.031303

KEYWORDS: Scanning electron microscopy, Semiconducting wafers, Optical lithography, Reticles, Image processing, Coating, Photoresist processing, Photomasks, Photoresist materials, Directed self assembly

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Proceedings Article | 21 March 2012 Paper

Pattern scaling with directed self assembly through lithography and etch process integration

Benjamen Rathsack, Mark Somervell, Josh Hooge, Makoto Muramatsu, Keiji Tanouchi, Takahiro Kitano, Eiichi Nishimura, Koichi Yatsuda, Seiji Nagahara, Iwaki Hiroyuki, Keiji Akai, Takashi Hayakawa

Proceedings Volume 8323, 83230B (2012) https://doi.org/10.1117/12.916311

KEYWORDS: Etching, Semiconducting wafers, Line edge roughness, Picosecond phenomena, Lithography, Polymers, Polymethylmethacrylate, Chemical analysis, Silicon, Directed self assembly

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Proceedings Article | 15 March 2012 Paper

Comparison of directed self-assembly integrations

Mark Somervell, Roel Gronheid, Joshua Hooge, Kathleen Nafus, Paulina Rincon Delgadillo, Chris Thode, Todd Younkin, Koichi Matsunaga, Ben Rathsack, Steven Scheer, Paul Nealey

Proceedings Volume 8325, 83250G (2012) https://doi.org/10.1117/12.916406

KEYWORDS: Semiconducting wafers, Image processing, Optical lithography, Thin film coatings, Lithography, Etching, Reticles, Scanners, Scanning electron microscopy, Directed self assembly

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SPIE Journal Paper | 1 July 2011

Extreme-ultraviolet secondary electron blur at the 22-nm half pitch node

Roel Gronheid, Todd Younkin, Michael Leeson, Carlos Fonseca, Joshua Hooge, Kathleen Nafus, John Biafore, Mark Smith

JM3, Vol. 10, Issue 03, 033004, (July 2011) https://doi.org/10.1117/12.10.1117/1.3607429

KEYWORDS: Data modeling, Extreme ultraviolet, Diffusion, Stochastic processes, Line width roughness, Extreme ultraviolet lithography, Polymers, Absorption, Solids, Critical dimension metrology

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Proceedings Article | 25 March 2011 Paper

EUV secondary electron blur at the 22nm half pitch node

Roel Gronheid, Todd Younkin, Michael Leeson, Carlos Fonseca, Joshua Hooge, Kathleen Nafus, John Biafore, Mark Smith

Proceedings Volume 7969, 796904 (2011) https://doi.org/10.1117/12.881427

KEYWORDS: Data modeling, Diffusion, Line width roughness, Extreme ultraviolet, Stochastic processes, Extreme ultraviolet lithography, Polymers, Absorption, Solids, Critical dimension metrology

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SPIE Journal Paper | 1 January 2011

Resolution-linewidth roughness-sensitivity performance tradeoffs for an extreme ultraviolet polymer bound photo-acid generator resist

Roel Gronheid, Alessandro Vaglio Pret, Benjamen Rathsack, Joshua Hooge, Steven Scheer, Kathleen Nafus, Hideo Shite, Junichi Kitano

JM3, Vol. 10, Issue 1, 013017, (January 2011) https://doi.org/10.1117/12.10.1117/1.3555090

KEYWORDS: Extreme ultraviolet, Diffusion, Polymers, Data modeling, Line width roughness, Extreme ultraviolet lithography, Quantum efficiency, Absorbance, Silicon, Contamination

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Proceedings Article | 26 March 2010 Paper

EUV RLS performance tradeoffs for a polymer bound PAG resist

Roel Gronheid, Alessandro Vaglio Pret, Benjamen Rathsack, Joshua Hooge, Steven Scheer, Kathleen Nafus, Hideo Shite, Junichi Kitano

Proceedings Volume 7639, 76390M (2010) https://doi.org/10.1117/12.847489

KEYWORDS: Extreme ultraviolet, Polymers, Diffusion, Line width roughness, Data modeling, Quantum efficiency, Silicon, Absorbance, Interfaces, Contamination

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Proceedings Article | 16 March 2009 Paper

A CDU comparison of double patterning process options using Monte Carlo simulation

Josh Hooge, Shinichi Hatakeyama, Kathleen Nafus, Steven Scheer, Philippe Foubert, Shaunee Cheng, Philippe Leray

Proceedings Volume 7274, 72741U (2009) https://doi.org/10.1117/12.814332

KEYWORDS: Etching, Critical dimension metrology, Monte Carlo methods, Double patterning technology, Photoresist processing, Semiconducting wafers, Dielectrophoresis, Overlay metrology, Calibration, Lithography

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Proceedings Article | 7 March 2008 Paper

Image contrast contributions to immersion lithography defect formation and process yield

Ben Rathsack, Josh Hooge, Steven Scheer, Kathleen Nafus, Shinichi Hatakeyama, Hontake Kouichi, Junichi Kitano, Dieter Van Den Heuval, Philippe Leray, Eric Hendrickx, Phillipe Foubert, Roel Gronheid

Proceedings Volume 6924, 69244W (2008) https://doi.org/10.1117/12.772728

KEYWORDS: Line edge roughness, Polymers, Semiconducting wafers, Nanoimprint lithography, Image processing, Immersion lithography, Photoresist processing, Diffusion, Scanning electron microscopy, Reticles

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Proceedings Article | 23 March 2007 Paper

A multi-tiered approach to 193nm immersion defect reduction through track process adjustments

Eugenia Ng, Joshua Hooge

Proceedings Volume 6519, 651926 (2007) https://doi.org/10.1117/12.712361

KEYWORDS: Semiconducting wafers, Head-mounted displays, Silicon, Thin film coatings, Scanners, Photoresist processing, Immersion lithography, Reticles, Contamination, Lithography

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Proceedings Article | 29 March 2006 Paper

Defectivity reduction by optimization of 193-nm immersion lithography using an interfaced exposure-track system

Michael Carcasi, Shinichi Hatakeyama, Kathleen Nafus, Richard Moerman, Youri van Dommelen, Peter Huisman, Joshua Hooge, Steven Scheer, Philippe Foubert

Proceedings Volume 6153, 61533J (2006) https://doi.org/10.1117/12.656444

KEYWORDS: Photoresist processing, Thin film coatings, Immersion lithography, Scanners, Lithography, Binary data, Standards development, Contamination, Image processing, 193nm lithography

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As the integration of semiconductor devices continues, pattern sizes required in lithography get smaller and smaller. To achieve even more scaling down of these patterns without changing the basic infrastructure technology of current cutting-edge 193-nm lithography, 193-nm immersion lithography is being viewed as a powerful technique that can accommodate next-generation mass productions needs. Therefore this technology has been seriously considered and after proof of concept it is currently entering the stage of practical application. In the case of 193-nm immersion lithography, however, because liquid fills the area between the projection optics and the silicon wafer, several causes of concern have been raised - namely, diffusion of moisture into the resist film due to direct resist-water interaction during exposure, dissolution of internal components of the resist into the de-ionized water, and the influence of residual moisture generated during exposure on post-exposure processing. To prevent these unwanted effects, optimization of the three main components of the lithography system: materials, track and scanner, is required. For the materials, 193nm resist formulation improvements specifically for immersion processing have reduced the leaching and the sensitivity to water related defects, further benefits can be seen by the application of protective top coat materials. For the track component, optimization of the processing conditions and immersion specific modules are proven to advance the progress made by the material suppliers. Finally, by optimizing conditions on the 3^rd generation immersion scanner with the latest hardware configuration, defectivity levels comparable to dry processing can be achieved. In this evaluation, we detail the improvements that can be realized with new immersion specific track rinse modules and formulate a hypothesis for the improvements seen with the rinsing process. Additionally, we show the current status of water induced immersion specific defect reduction using the latest advances in technology.

Showing 5 of 11 publications

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