In this paper, a low power startup circuit is designed to ensure the circuit can be started with a supply voltage of 2.8-6V. The performance of the circuit is guaranteed by the use of a series of trimming circuits. The circuit adopts 180nm BCD technology and operates at a 5V power supply voltage. Simulation results show that the temperature coefficient is 1.3ppm/°C from -40 °C to 125 °C. In low frequencies, the power supply rejection ratio is 110dB. In the range of 2.8V-6V power supply voltage, the output reference voltage value is 2.501V.
As a key module of the phase-locked loop in the RF transceiver system, the performance of the voltage controlled oscillator directly affects the performance of the entire system. This article focuses on the application of low-power phase-locked loop systems and designs a low-power and low phase noise voltage controlled oscillator circuit. The circuit structure is improved on the C-class LC voltage controlled oscillator structure, using a resistor array and current mirror to achieve gate dynamic bias, thereby solving the startup problem of the C-class voltage controlled oscillator and ensuring that the circuit maintains the C-class working state after stable oscillation. CMOS complementary cross coupling is adopted to achieve current reuse and reduce power consumption. By removing the tail current MOSFET, the source of phase noise is reduced, making the overall phase noise of the circuit lower and more suitable for low voltage application scenarios. The design of this article is based on TSMC 40nm CMOS technology. Simulation results show that under a power supply voltage of 0.8V, the overall power consumption of the oscillator is 0.871mW. It can cover the frequency range of 2.37-2.44GHz at all process angles, and the phase noise at the 2.4GHz frequency point is less than -122.28 dBc/ Hz@1MHz Meet the performance requirements of phase-locked loops.
Based on the xfab-0.18um HV SOI process, a self-adaptive BUCK-type dual-channel synchronous DC-DC controller was designed, using the D-CAP ( Directly from the output capacitors) mode with adaptive conduction time for loop control. The D-CAP mode has high efficiency, fast response, and simple The D-CAP mode has high efficiency, fast response, and simple loop control, simplifying the circuit while improving the stability and reliability of the system circuit. synchronous buck controller includes three operating modes: PWM mode, Auto skip mode, and PSM mode, which can address applications with light loads and heavy loads. The final designed dual-channel synchronous buck controller includes three operating modes: PWM mode, Auto skip mode, and PSM mode, which can address applications with light loads and heavy loads. The controller supports an input voltage range of 5.528V and an output voltage range of 25.5V. efficiency with an input voltage of 12V and an output voltage of 5V. Under the highest frequency application, the ripple is less than 50mV, and the load transient response time is less than 3%. Under the highest frequency application, the ripple is less than 50mV, and the load transient response time is less than 3us. Finally, the overall circuit was simulated and analyzed, and the results met the expected targets.
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