Mr. Mohamed Salama Profile

Mohamed Salama

Pr. Field Application Engineer

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Publications (5)

Proceedings Article | 30 March 2017 Presentation + Paper

Design intent optimization at the beyond 7nm node: the intersection of DTCO and EUVL stochastic mitigation techniques

Michael Crouse, Lars Liebmann, Vince Plachecki, Mohamed Salama, Yulu Chen, Nicole Saulnier, Derren Dunn, Itty Matthew, Stephen Hsu, Keith Gronlund, Francis Goodwin

Proceedings Volume 10148, 101480H (2017) https://doi.org/10.1117/12.2260865

KEYWORDS: Extreme ultraviolet, Extreme ultraviolet lithography, Stochastic processes, Optical lithography, Lithography, Tolerancing, Computational lithography, Design for manufacturability, Manufacturing, Back end of line, Source mask optimization, Photomasks, Logic, Optical proximity correction, Nanoimprint lithography

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The initial readiness of EUV patterning was demonstrated in 2016 with IBM Alliance's 7nm device technology. The focus has now shifted to driving the 'effective' k1 factor and enabling the second generation of EUV patterning. Thus, Design Technology Co-optimization (DTCO) has become a critical part of technology enablement as scaling has become more challenging and the industry pushes the limits of EUV lithography. The working partnership between the design teams and the process development teams typically involves an iterative approach to evaluate the manufacturability of proposed designs, subsequent modifications to those designs and finally a design manual for the technology. While this approach has served the industry well for many generations, the challenges at the Beyond 7nm node require a more efficient approach. In this work, we describe the use of “Design Intent” lithographic layout optimization where we remove the iterative component of DTCO and replace it with an optimization that achieves both a “patterning friendly” design and minimizes the well-known EUV stochastic effects. Solved together, this “design intent” approach can more quickly achieve superior lithographic results while still meeting the original device’s functional specifications.

Specifically, in this work we will demonstrate “design intent” optimization for critical BEOL layers using design tolerance bands to guide the source mask co-optimization. The design tolerance bands can be either supplied as part of the original design or derived from some basic rules. Additionally, the EUV stochastic behavior is mitigated by enhancing the image log slope (ILS) for specific key features as part of the overall optimization. We will show the benefit of the “design intent approach” on both bidirectional and unidirectional 28nm min pitch standard logic layouts and compare the more typical iterative SMO approach. Thus demonstrating the benefit of allowing the design to float within the specified range. Lastly, we discuss how the evolution of this approach could lead to layout optimization based entirely on some minimal set of functional requirements and process constraints.

Proceedings Article | 23 March 2016 Paper

Expanding the printable design space for lithography processes utilizing a cut mask

Jerome Wandell, Mohamed Salama, William Wilkinson, Mark Curtice, Jui-Hsuan Feng, Shao Wen Gao, Abhishek Asthana

Proceedings Volume 9781, 978112 (2016) https://doi.org/10.1117/12.2219201

KEYWORDS: Photomasks, Lithography, Optical proximity correction, Double patterning technology, Optical lithography, Design for manufacturability, Manufacturing, Lithographic illumination, Semiconductors, Logic devices, Printing, Photovoltaics, Analog electronics, Etching, Line width roughness, SRAF

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Proceedings Article | 16 March 2016 Paper

Wafer hotspot prevention using etch aware OPC correction

Ayman Hamouda, Dave Power, Mohamed Salama, Ao Chen

Proceedings Volume 9781, 978115 (2016) https://doi.org/10.1117/12.2220778

KEYWORDS: Etching, Optical proximity correction, Optical lithography, Semiconducting wafers, Calibration, Photomasks, Bridges, Yield improvement, Computer simulations, Lithography

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Proceedings Article | 18 March 2015 Paper

Efficient etch bias compensation techniques for accurate on-wafer patterning

Mohamed Salama, Ayman Hamouda

Proceedings Volume 9427, 94270X (2015) https://doi.org/10.1117/12.2085956

KEYWORDS: Etching, Critical dimension metrology, Optical proximity correction, Model-based design, Process modeling, Semiconducting wafers, Metals, Optical lithography, Calibration, Data modeling

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Proceedings Article | 16 September 2014 Paper

Efficient model-based dummy-fill OPC correction flow for deep sub-micron technology nodes

Ayman Hamouda, Mohamed Salama

Proceedings Volume 9235, 92351W (2014) https://doi.org/10.1117/12.2070544

KEYWORDS: Optical proximity correction, Photomasks, SRAF, Model-based design, Printing, Optical lithography, Chemical mechanical planarization, Etching, Resolution enhancement technologies, Semiconducting wafers

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