We have developed a portable, breast margin assessment probe leveraging diffuse optical spectroscopy to quantify the morphological landscape of breast tumor margins during breast conserving surgery. The approach presented here leverages a custom-made 16-channel annular photodiode imaging array (arranged in a 4×4 grid), a raster-scanning imaging platform with precision pressure control, and compressive sensing with an optimized set of eight wavelengths in the visible spectral range. A scalable Monte-Carlo-based inverse model is used to generate optical property [μs′(λ) and μa(λ)] measures for each of the 16 simultaneously captured diffuse reflectance spectra. Subpixel sampling (0.75 mm) is achieved through incremental x, y raster scanning of the imaging probe, providing detailed optical parameter maps of breast margins over a 2×2 cm2 area in ∼9 min. The morphological landscape of a tumor margin is characterized using optical surrogates for the fat to fibroglandular content ratio, which has demonstrated diagnostic utility in delineating tissue subtypes in the breast.
Spatially–resolved diffuse reflectance (SRDR) measurements provide photon path information, and enable layered tissue analysis. This paper presents experimental SRDR measurements on two-layer PDMS skin tissue-mimicking phantoms of varying top layer thicknesses, and bulk phantoms of varying optical properties using concentric multi-pixel photodiode array (CMPA) probes, and corresponding forward Monte Carlo simulations. The CMPA is the most densely packed semiconductor SRDR probe reported to date. Signal contrasts between the single layer phantom and bi-layer phantoms with varying top layer thicknesses are as high as 80%. The mean error between the Monte Carlo simulations and the experiment is less than 6.2 %.
Diffuse reflectance spectroscopy has been previously explored as a promising method for providing real-time visual
maps of tissue composition to help surgeons determine breast lumpectomy margins and to ensure the complete removal
of a tumor during surgery. We present the simple design, validation, and implementation of a compact and cost-effective
spectral imaging system for the application of tumor margin assessment. Our new system consists of a broadband source
with bandpass filters for illumination and a fabricated custom 16-pixel photodiode imaging array for the detection of
diffuse reflectance. The system prototype was characterized in tissue-mimicking phantoms and has an SNR of greater
than 40 dB in phantoms, animals, and human tissue. We show proof-of-concept for performing fast, wide-field spectral
imaging with a simple, inexpensive design. The strategy also allows for the scaling to higher pixel number and density in
future iterations of the system.
We present the heterogeneous integration of a 3.8 μm thick InGaAs/GaAs edge emitting laser that was metal-metal
bonded to SiO2/Si and end-fire coupled into a 2.8 μm thick tapered SU8 polymer waveguide integrated on the same
substrate. The system was driven in pulsed mode and the waveguide output was captured on an IR imaging array to
characterize the mode. The waveguide output was also coupled into a multimode fiber, and into an optical head and
spectrum analyzer, indicating lasing at ~997 nm and a threshold current density of 250 A/cm2.
The integration of thin film edge emitting lasers onto silicon enables the realization of planar photonic structures for
interconnection and for miniaturized optical systems that can be integrated in their entirety at the chip scale. These thin
film emitters are compound semiconductor lasers that are optimized for operation without the growth substrate.
Removal of the laser growth substrate, coupled with bonding to the silicon host substrate, enable the integration of high
quality edge emitting lasers with silicon. This paper explores the challenges, approaches, fabrication processes, and
progress in the integration of thin film edge emitting lasers integrated onto silicon.
The integration of planar optical components at the chip scale with electronic and microfluidic systems is enabling an
increased penetration of optical functionality into systems, and in particular, into highly portable systems. Planar
lightwave integrated circuits can enable functions such as optical signal interfaces, optical signal distribution, and optical
sensing in a planar platform that leverages microelectronic manufacturing technologies. Key to the realization of these
chip scale systems are the design and implementation of thin film optoelectronic materials and devices, heterogeneous
integration of components, planar polymer waveguides and waveguiding structures, and optical sensors. The integration
of photonic components and subsystems with electronic systems and microfluidics systems are also topics of intense
investigation for chip scale system with increasing levels of function. Application areas that are emerging include optical
signal interfaces and distribution, as well as chip scale integrated optical sensing systems with applications in medicine
and the environment.
Miniaturized, portable sensing systems for medical and environmental diagnostics and monitoring are an excellent
application area for microresonator sensors. Polymer microresonators are attractive components for chip scale integrated sensing because they can be integrated in a planar format using standard semiconductor manufacturing technologies. Vertically coupled microresonators, where the waveguides lie below or above the microresonator, can be fabricated using standard photolithography, enabling low cost integrated sensor systems. Microresonators can be surface customized for discrimination in, for example, chemical sensing applications, or the surface can be functionalized for biological sensing applications. To create chip scale integrated sensing systems, microresonators can be integrated with planar optical system components, such as polymer waveguides and thin film photodetectors, onto silicon using heterogeneous integration. Heterogeneous integration can also be used to integrate optical sources with sensors onto host substrates such as silicon.
High speed optical interconnections offer an attractive alternative to electrical interconnections, particularly when they can be integrated into electrical systems. In particular, waveguide signal distribution and optical to electrical (O/E) conversion are critical to the integration of optical signals into electrical systems. The integration and interfaces between waveguides and O/E devices is a topic under intensive study. One approach to the integration of optical interconnections into electrical systems is to use fully embedded thin film optoelectronic (OE) devices in planar lightwave components on electrical interconnection substrates. In this approach, the propagating optical signal from the optical waveguide can be evanescently or directly coupled into the embedded thin film OE devices based on the embedded structure. Efficient and high speed optical signal distribution and O/E conversion, such as those using planar channel polymer waveguides with embedded thin film photodetectors, are examples of optical interconnection critical functions that are optimally implemented in electrical systems. In this paper, a 1 by 4 thin film metal semiconductor metal (MSM) photodetector (PD) array is embedded in a 1 by 4 photoimageable polymer multimode interference (MMI) coupler. This optical distribution and E/O system was fabricated and experimentally characterized at a wavelength of 1.3 μm. The measured overall loss, including the propagation loss and splitting loss of the MMI coupler was -0.18 dB at λ = 1.3 μm.
Practical, packaged photodetectors (PDs) must be interfaced to bias and transmission lines, which introduce parasitics. These parasitics (resistance, capacitance and inductance) can be used to shape the temporal and frequency response of packaged photodetectors. Thus, the bias circuitry, external passives, and high speed interconnections must be carefully designed to produce the desired response in a packaged photodetector. Applications dictate the desired PD characteristics, which are generally either a flat frequency response, or a fast, ring-free impulse response. In this paper, the effects of the parasitic resistance, capacitance, and inductance are studied to affect the intrinsic response of photodetectors for a flat frequency response or a fast ring-free impulse response. For the optical transmission of microwave and millimeter wave RF signals, such as remote antennas or radar arrays, a flat frequency response is critical. A flat frequency response can be obtained from controlled ringing in the temporal domain. This paper explores the control of ringing in the temporal domain using varied external loads. A fast fall time, ring-free pulse is useful for digital communications applications where ringing can degrade the bit error rate. Fourier transforms show that a ring-free impulse response has a characteristic fall-off at high frequencies. However, this fall-off is detrimental for frequency domain applications, so the optimization condition for the inductance and capacitance is different for these applications. This paper explores the suppression of the impulse response tail by varying the external loads.
The integration of active optoelectronic devices, passive optical devices, and electronics into planar lightwave integrated circuits (PLICs) at the chip level, and planar lightwave integrated systems (PLIS) at the substrate or package level, have applications in optical interconnection, optical signal distribution and processing, and in integrated optical sensing. Heterogeneous integration of thin film devices is an effective method of creating PLICs and PLIS. Thin film InP-based edge emitters and thin film photodetectors have been integrated with polymer waveguides to create planar lightwave systems.
Optical sensing, and the integration of sensors and electronics into Sensor on a Chip and Sensor on a Package systems are an approach to the creation of miniaturized, portable, customizable, low cost sensor systems for rapid health diagnostics, medical research, environmental monitoring, and security monitoring. To integrate optical sensing systems that are autonomous, it is essential to integrate the sensor, light source, and light detection into a single substrate or chip. The integration of this optical system with signal control and processing electronics enable discrimination with individually customized sensors in sensor arrays, and high sensitivity levels. Thin film optoelectronic active device integration with planar optical passive devices is a heterogeneous integration method for fabricating planar lightwave integrated circuits at the chip level and planar lightwave integrated systems at the substrate and package level.
KEYWORDS: Sensors, Analog electronics, Waveguides, Interference (communication), Signal processing, Quantization, Signal to noise ratio, Detector arrays, System on a chip, Embedded systems
Arrays of embedded bipolar junction transistor (BJT) photo detectors (PD) and a parallel mixed-signal processing system were fabricated as a silicon complementary metal oxide semiconductor (Si-CMOS) circuit for the integration optical sensors on the surface of the chip. The circuit was fabricated with AMI 1.5um n-well CMOS process and the embedded PNP BJT PD has a pixel size of 8um by 8um. BJT PD was chosen to take advantage of its higher gain amplification of photo current than that of PiN type detectors since the target application is a low-speed and high-sensitivity sensor. The photo current generated by BJT PD is manipulated by mixed-signal processing system, which consists of parallel first order low-pass delta-sigma oversampling analog-to-digital converters (ADC). There are 8 parallel ADCs on the chip and a group of 8 BJT PDs are selected with CMOS switches. An array of PD is composed of three or six groups of PDs depending on the number of rows.
As an alternative approach to current electrical interconnection technology, optical interconnections at high speeds offer several potential advantages including small footprint, simple system design (in comparison to transmission lines), and immunity to electromagnetic interference. There are a number of approaches to integrating optical signal paths in electrical interconnection substrates such as backplanes, boards, and modules. One approach utilizes the heterogeneous integration of thin film optoelectronic (OE) devices embedded in waveguides. Optical signals can be coupled in from external fibers or from thin film lasers integrated onto the substrate, propagated, distributed, and processed in a planar waveguide format, and then coupled from the waveguide to an embedded thin film photodetector by evanescent field or direct coupling. This approach achieves alignment through assembly and successive masking layers and thus minimizes alignment issues. In addition, the integrated optical signal distribution system can be integrated onto the electrical interconnection substrate after the substrate has been fabricated using post processing, thus, the board facility is not impacted through the integration of the optical links.
In this paper, a discussion of the fabrication processes as well as coupling efficiency and speed measurement results for thin film InGaAs PDs embedded in polymer waveguides integrated onto Si substrates is included. These results are compared to theoretical estimates of the coupling efficiency, which was estimated using the finite difference beam propagation method.
As optoelectronic devices increase in speed, the measurement system used to characterize these devices must have sufficient bandwidth and minimum parasitic loading during test to accurately determine the intrinsic performance of the device under test. Conventional electrical measurement systems have an intrinsic bandwidth due to the available components for test and have parasitic loading due to direct electrical contact to the device under the test. Electro-optic sampling is an excellent measurement technique for characterizing ultra-fast devices because it has high bandwidth, is non-contact, is non-destructive, and relatively non-invasive. In this paper, an optical fiber-based electro-optic sampling system is designed and used for characterizing high speed InGaAs thin film MSM photodetectors. A fiber laser which is operating at 1556 nm wavelength was used for the sampling and excitation beam. Optical fibers were used to connect each component in the system for flexibility. InGaAs thin film MSM photodetectors were fabricated and characterized. InGaAs thin film MSM photodetectors were bonded onto a coplanar strip line deposited on a benzocyclobutene (BCB)-coated glass substrate for characterization. These thin film photodetectors show high speed operation combined with high responsivity and large detection area compared to P-I-N photodetectors operating at similar speeds
Photodetectors (PDs) are an important active device in optoelectronic integrated circuits (OEICs), and, for shorter haul interconnections where circuit (e.g. transimpedance amplifier (TIA)) noise may be the dominant noise in receivers, metal-semiconductor-metal photodiodes (MSM PDs) are attractive due to their low capacitance per unit area compared to PIN photodetectors and the ease of monolithic integration with field effect transistors (FETs). Inverted-MSM PDs (I-MSM PDs), which are thin film MSM PDs with the fingers on the bottom of the device, have demonstrated higher responsivities compared to conventional MSM PDs while maintaining small capacitance per unit area, low dark current (~nA), and high speed. However, the modeling of MSM PDs and I-MSM PDs for insertion into circuit simulators for integrated PD/TIA modeling has not been reported. In this paper, an accurate high-frequency equivalent circuit-level model of thin film I-MSM PDs is obtained using an on-wafer measurement-based modeling technique. This circuit-level model of MSM PDs can be used for capacitance sensitive preamplifier design for co-optimization with widely used simulators (ADS and HSPICE). The obtained circuit-level model shows good agreement with measured s-parameters.
Linear statistical models have been generated to predict the performance of metal-semiconductor-metal (MSM) PDs for multi-gigabit optical interconnections. The models estimate the bandwidth and responsivity of the MSM PDs based on the input factors: absorbing layer thickness, detector size, finger widths and finger gaps. The design of experiments (DOE) approach was employed to obtain the necessary data to construct the models.
Numerous samples were fabricated so that multiple devices measurements could serve to both construct and verify the linear statistical models. The MSM PDs were fabricated from material with structure InAlAs/InAlGaAs/InGaAs (2000Å, 3000Å or 5000Å, absorbing layer)/InAlAs. The MSM interdigitated fingers were photolithographically defined with finger gaps and widths varying as DOE parameters. A benzocyclobutene (BCB, Cyclotene 35) layer was spin-coated onto all of the samples as isolation from the probing pads.
In the bandwidth analysis, the detector size (S) and material thickness (T) were investigated with a fixed finger width (1 μm) and gap (1 μm). Taking the measured results of these detectors in the design matrix, and using least square regression, the model equations were derived as: Bandwidth (GHz) = 12.87 - 0.065S - 3T - 0.02ST. After these equations were developed, predictive calculated results from these equations were then further used to predict and compare measured results on devices that were not used in the statistical model. This leads to an average deviation between predicted and measured bandwidth of less than 5%. In the responsivity analysis, the predictive calculation leads to an average deviation less than 11%.
Nan Marie Jokerst, Martin Brooke, Joy Laskar, D. Scott Wills, April Brown, Olivier Vendier, Steven Bond, Jeffrey Cross, Michael Vrazel, Mikkel Thomas, Myunghee Lee, Sungyong Jung, YoongJoon Joo, Jae Chang
KEYWORDS: Silicon, Thin films, Very large scale integration, Optoelectronics, Optical interconnects, Thin film devices, Analog electronics, Etching, Receivers, Optoelectronic devices
Smart photonics, the integration of optoelectronic devices with electronic circuits and systems, has growing applications in many fields, one of which is computing. An exploration of the opportunities, integration technologies, and some recent results using thin film optoelectronic and electronic device integration with Si CMOS VLSI and GaAs MESFET technologies are presented herein. Applications explored herein include low cost alignment tolerant optoelectronic interconnection links for network inerconnections, smart focal plane array processing through the integration of imaging arrays with sigma delta analog to digital converters underneath each pixel, and three dimensional computational systems using vertical through-Si optical interconnections.
Multidisciplinary team-oriented research is an effective method for investigating systems spanning multiple knowledge areas. Building on cross-functional team strategies developed for highly competitive industries, experts from a variety of technical domains can be brought together in a team and focused toward a common set of goals. However, building and maintaining these teams is an art that combines technical, social, and management skills, and requires proactive, conscious attention to enable and achieve positive results. This paper explores some avenues toward effective multi-disciplinary team building, and explores the educational potential associated with team-oriented research.
This paper presents the results of simultaneously working fully-differential optoelectronic receiver fabricated in Si CMOS with digital SIMD microprocessor on the same die next to analog, optical interface circuitry, the receiver have been hybrid integrated with a thin film InP-based inverted (I)-MSM photodetector and optically tested using external light source modulated by digital input signal. The noise immunity to mixed-signal digital switching noise of the differential receiver has been shown to be good enough to generate 10-9 BER.
The continued emergence of wireless applications as perhaps the most financially significant market in recent years, wireless technology has become a global core competency. The demand for increasingly higher rates of data transmission, low-power operation and high frequency operation will eventually require integration of nanoscale electronics into available silicon technologies. A broad application base is expected for co-integrated resonant tunneling/CMOS technology (termed QMOS for quantum metal oxide semiconductor) because of the expected factor of 5 to 10 increase in functional density and speed when compared to conventional all-CMOS high speed circuit approaches. These circuits are realized by integrating compound semiconductor resonant tunneling diodes and three terminal high frequency components with conventional CMOS circuitry through the use of thin-film integration processes. The focus of this work is to develop reliable, densely packed nanoelectronic interfaces to bring higher functionality to Si systems. We combine: (1) high performance, resonant tunneling electronics; (2) high frequency, wireless electronics; and (3) conventional CMOS electronics into a single wafer level integrated system.
The fabrication and performance of thin film p-i-n and metal-semiconductor-metal (MSM) photodetectors and the integration of these detectors onto silicon circuitry is presented. The thin film photodetectors are separated from the growth substrate using epitaxial lift off or total substrate removal, and are subsequently bonded to silicon circuits. Performance of the thin film photodetectors is comparable to on-wafer counterparts, and in the cases of resonant cavity p-i-ns and inverted (fingers on the bottom) MSMs, the performance is enhanced through the removal of the substrate. Receiver circuits have been designed, integrated with thin film photodetectors, and tested. Finally, smart pixel arrays of photodetectors have been integrated directly on top of an array of silicon oscillator circuits to demonstrate three dimensionally interconnected image processing systems.
The integration of thin film optoelectronic devices with host substrates such as circuits, waveguides, and micromachines offers to the systems engineer the freedom to choose the optimal materials to achieve performance and cost objectives. In essence, the bonding of the thin film components becomes an integral part of the system packaging. The fabrication and integration of thin film compound semiconductor optoelectronic devices with a number of host substrates is presented. Thin film devices have been integrated with silicon circuits, and movable micromachines, and have been used to demonstrate three dimensionally interconnected systems. The three dimensionally integrated systems include detector arrays bonded directly on top of circuits for massively parallel processing of images, and vertical optical interconnections have been demonstrated between stacked layers of silicon circuits (which are transparent to the wavelength of light used) for a massively parallel processing architecture based upon low memory and high input/output.
High frame rate infrared scene generation depends on high performance digital processors that are tightly coupled to infrared emitter arrays. Massively parallel image generation hardware can realize the type of high throughput, high frame rate processing that will characterize the next generation of scene generators. This work outlines projects in massively parallel, high throughput image generation hardware using thin film optoelectronic devices which are integrated directly onto low cost silicon integrated circuits. For basic scene generation, an array of thin film emitters are placed on top of digital single instruction stream, multiple data stream (SIMD) parallel processors to provide high performance focal plane generation in a monolithic system. For more complex scene generation, low cost stacked silicon integrated circuits, using through-silicon wafer optoelectronic channels for three dimensional interconnections, form an extremely dense, high throughput, three dimensional parallel processing system. Thin film InGaAsP devices, which operate at wavelengths to which silicon is transparent, are integrated on top of standard foundry silicon integrated circuits so that stacked processor chips can communicate vertically. High speed analog interface circuitry on the Si integrated circuits provides a high bandwidth link between the devices and the digital processing circuitry. This processing approach provides tremendous generality for high frame rate image generation applications in a compact system. Issues addressed include system interfacing, power management, manufacturing tolerances, testing and repair, and system cost and effectiveness.
While many circuit designers have tackled the problem of CMOS digital communications receiver design, few have considered the problem of circuitry suitable for an all CMOS digital IC fabrication process. Faced with a high speed receiver design the circuit designer will soon conclude that a high speed analog-oriented fabrication process provides superior performance advantages to a digital CMOS process. However, for applications where there are overwhelming reasons to integrate the receivers on the same IC as large amounts of conventional digital circuitry, the low yield and high cost of the exotic analog-oriented fabrication is no longer an option. The issues that result from a requirement to use a digital CMOS IC process cut across all aspects of receiver design, and result in significant differences in circuit design philosophy and topology. Digital ICs are primarily designed to yield small, fast CMOS devices for digital logic gates, thus no effort is put into providing accurate or high speed resistances, or capacitors. This lack of any reliable resistance or capacitance has a significant impact on receiver design. Since resistance optimization is not a prerogative of the digital IC process engineer, the wisest option is thus to not use these elements, opting instead for active circuitry to replace the functions normally ascribed to resistance and capacitance. Depending on the application receiver noise may be a dominant design constraint. The noise performance of CMOS amplifiers is different than bipolar or GaAs MESFET circuits, shot noise is generally insignificant when compared to channel thermal noise. As a result the optimal input stage topology is significantly different for the different technologies. It is found that, at speeds of operation approaching the limits of the digital CMOS process, open loop designs have noise-power-gain-bandwidth tradeoff performance superior to feedback designs. Furthermore, the lack of good resisters and capacitors complicates the use of feedback circuits. Thus feedback is generally not used in the front-end of our digital process CMOS receivers.
2D monolithic grating spectrometers for dense wavelength division multiplexing (WDM) show considerable promise to extend the usable bandwidth of optical fibers. Their performance is fundamentally dictated by the grating which is used. First order gratings will theoretically improve the performance of monolithic WDM devices, since WDM devices based on first order gratings do not suffer from an inherent tradeoff between efficiency and broadband operation.
Access to the requested content is limited to institutions that have purchased or subscribe to SPIE eBooks.
You are receiving this notice because your organization may not have SPIE eBooks access.*
*Shibboleth/Open Athens users─please
sign in
to access your institution's subscriptions.
To obtain this item, you may purchase the complete book in print or electronic format on
SPIE.org.
INSTITUTIONAL Select your institution to access the SPIE Digital Library.
PERSONAL Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.