Patrick Kearney
Process Engineer at Tokyo Electron Europe Ltd
SPIE Involvement:
Author
Publications (1)

Proceedings Article | 24 March 2009 Paper
Proceedings Volume 7272, 727241 (2009) https://doi.org/10.1117/12.814246
KEYWORDS: Scatterometry, Metrology, Semiconducting wafers, Data modeling, Critical dimension metrology, Scanning electron microscopy, Optical properties, Scatter measurement, Cadmium, Lithography

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