Dr. Steffen Steinert Profile

Dr. Steffen Steinert

Project Manager at Carl Zeiss SMT GmbH

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Publications (11)

Proceedings Article | 21 November 2023 Poster + Paper

Dense mask registration fingerprint characterization to better understand and mitigate the metrology to device offset

Richard van Haren, Steffen Steinert, Orion Mouraille, Oktay Yildirim, Jan Hermans, Leon van Dijk, Dirk Beyer

Proceedings Volume 12751, 127511A (2023) https://doi.org/10.1117/12.2687307

KEYWORDS: Overlay metrology, Metrology, Image registration, Semiconducting wafers, Zoom lenses, Scanning electron microscopy, Scanners, Optical alignment, Environmental sensing

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Over the past years, we have demonstrated that off-line mask registration measurements as measured by the Zeiss PROVE tool correlate very well (R2 > 0.96) with the on-wafer measurements. The first correlation study was based on scanner wafer alignment marks. Wafer alignment marks are metrology structures that can be readout by the alignment sensor inside the scanner. After we established the correlation, we continued the investigation by exploring overlay metrology targets. Also in this case, a very good correlation (R2 > 0.92) was found in the sub-nanometer regime. This could be achieved due the fact that overlay metrology targets are much smaller in size compared to the scanner wafer alignment marks. This enables the possibility to measure basically the same target areas by the PROVE and the ASML Yieldstar (YS:375) overlay metrology tool. The resulting residual level between mask and on-wafer measurements was less than 0.14-nm (99.7%) at wafer level (1×). The small mismatch that was remaining could be attributed to local mask writing variations inside the overlay metrology targets. The local variations triggered us to consider the mask writing impact on the placement errors for individual device features. Even for this case at device level, a very good correlation was observed between the mask registration measurements and the on-wafer results. This time, the on-wafer results were obtained by using a large field-of-view SEM. From all the findings above, we can basically conclude that off-line mask registration measurements can be used as overlay predictors in a production environment. This enables computational overlay metrology from scanner alignment marks, to overlay metrology targets, down to single device features. It might be obvious that these findings could be very helpful in predicting the mask overlay contribution as part of the intra-field overlay contribution without actually performing the onwafer measurements and consequently reducing the fab cycle time. At this point, we would like to zoom out and consider how all the acquired knowledge can be utilized in a production environment. Basically, the mask-related local placement errors of all features within the exposure field on a wafer can be predicted accurately based on off-line mask measurements. However, before improving the on-product overlay and hence the yield, more insight is required on how the mask writing fingerprint looks like. Do we see a global fingerprint or do local effects dominate the fingerprint? Is the fingerprint the same for the overlay metrology targets and device? Or do we observe a metrology to device (MTD) offset? In this paper, we will show a dense characterization of the mask registration fingerprint. Off-line measurements were done on overlay metrology targets as well as on a structure representing the device pattern. We will show how the overlay metrology sampling layout selection will impact the device overlay performance. Based on this understanding, we aim at providing a strategy and a path forward on how to mitigate the mask related MTD offsets.

Proceedings Article | 1 December 2022 Presentation + Paper

Direct correlation between mask registration and on-wafer measurements for individual logic device features

Richard van Haren, Steffen Steinert, Orion Mouraille, Ewa Kasperkiewicz, Jan Hermans, Mahmudul Hasan, Leon van Dijk, Dirk Beyer

Proceedings Volume 12293, 122930L (2022) https://doi.org/10.1117/12.2641618

KEYWORDS: Photomasks, Semiconducting wafers, Logic, Image registration, Overlay metrology, Scanners, Metrology, Scanning electron microscopy, Optical alignment, Logic devices

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In all investigations that we performed over the past years; it has been clearly demonstrated that the off-line mask-to-mask overlay as determined on the Zeiss PROVE tool correlates very well with the on-wafer measurements. It all started off with a correlation study utilizing wafer alignment marks. Wafer alignment marks are metrology structures that can be read out inside ASML scanners by the wafer alignment sensor. In that work, the impact of the reticle alignment marks required to align the mask inside the scanner was incorporated as well. An excellent correlation (R2 < 0.96) was shown with an accuracy of 0.58-nm. This result was achieved after carefully setting up an experiment in photoresist and by ruling out any other additional overlay contributors other than mask and the scanner baseline overlay performance. After this initial success, we continued the investigation by considering µ-DBO (Diffraction Based Overlay) metrology targets that can be read out on an ASML Yieldstar (YS:375) overlay metrology tool. In this work, the complexity of the experiment was increased. Instead of using only photo resist, an industry relevant process Litho-Etch process flow was selected. The mask was written on a state-of-the-art writing tool (EBM-9000). Again, excellent correlation coefficients (R2 < 0.92) were obtained. This time within the sub-nanometer range at wafer level. During the execution of that work, an error source that contributes to the small mismatch (< 0.14-nm) between mask and on-wafer measurements was addressed: the sampling scheme difference of the signal generating areas. While the PROVE tool has been designed to measure local (feature) placement errors, this is not the case for an overlay metrology tool or the scanner wafer alignment sensor. For the latter two metrology systems, a position is obtained from a much larger region of interest (ROI) for which local placement errors are averaged out. The observed mismatch can easily be mitigated by increasing the number of PROVE measurements with a small ROI to match it with the ROI of the overlay metrology tool or the wafer alignment sensor. While studying the increasing number of local registration measurements by the PROVE tool, an interesting observation was made. The way the mask had been written on the mask e-beam writer seemed to be reflected in the residual local registration measurements! Stripes were observed that appear to be running across the full width of the mask. Since the typical dimensions of the stripes at wafer level are small compared to the areas that are used for overlay measurements and/or wafer alignment measurements, they are hard to detect on wafer by using optical techniques. In this follow-up work, we explore the correlation between mask registration measurements and the on-wafer measurement for individual device features. This means that we make another step-in complexity, the length scales of interest are now significantly below the typical dimensions of an overlay metrology target. To continue the correlation study, a large field of view SEM is required to measure the relative positions of the device features. We show that the way the mask has been written can indeed be found back on wafer! Although the local placement errors for a single logic device feature is in the order of ~0.5-nm at wafer level, we show that the correlation between mask measurements and wafer measurement still holds. This enables an interesting new application space that is addressed in the current paper.

Proceedings Article | 1 November 2022 Paper

New registration calibration strategies for MBMW tools by PROVE measurements

Michael Haberler, Peter Hudek, Michal Jurkovic, Elmar Platzgummer, Christoph Spengler, Lena Bachar, Steffen Steinert, Hui-Wen Lu-Walther, Dirk Beyer

Proceedings Volume 12472, 124720L (2022) https://doi.org/10.1117/12.2641517

KEYWORDS: Image registration, Calibration, Photomasks, Metrology, Overlay metrology, Electron beams, Extreme ultraviolet lithography, Distortion, Semiconductors

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Proceedings Article | 12 October 2020 Poster + Paper

The mask contribution as part of the intra-field on-product overlay performance

Richard van Haren, Steffen Steinert, Orion Mouraille, Jan Hermans, Leon van Dijk, Dirk Beyer

Proceedings Volume 11518, 1151813 (2020) https://doi.org/10.1117/12.2573190

KEYWORDS: Overlay metrology, Photomasks, Scanners, Optical alignment, Reticles, Logic, Sensors, Diffraction, Etching, Metrology

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Over the past few years, we have spent quite some effort to demonstrate that the off-line mask-to-mask overlay as determined on the PROVE tool correlates very well with the on-wafer overlay as measured by the scanner. The role and placement of the reticle alignment marks was considered in this analysis together with the reticle alignment model. The excellent correlation (R2 < 0.96) could only be achieved by a carefully set-up experiment. All potentially disturbing additional overlay contributors were ruled out. By doing so, a one-to-one comparison between the off-line determined mask-to-mask overlay and the on-wafer measured overlay could be made. This means that the mask-to-mask overlay as measured by PROVE directly translates into an on-product overlay contribution. The residual mismatch of ~ 0.6-nm could be attributed to the scanner itself and the sampling difference between a PROVE measurement and that of the alignment sensor inside the scanner. In this follow-up work, we will make a start to apply the knowledge that was obtained previously to a use-case that is much closer to what is common practice in the industry. An N7 equivalent technology process has been selected in combination with a state-of-the-art mask. This mask was made on an EBM-9000 system and contains μ-DBO (Diffraction Based Overlay) targets that can be readout on an ASML Yieldstar (YS:375) overlay metrology tool. Moreover, the mask contains electrical-test structures and random logic features. This makes it possible to study the onproduct overlay performance from the exposure field level down to a single logic feature on the mask! The mask is not the only contributor to the on-product overlay. Other on-product overlay contributors may be present as well. The current investigation aims to understand the on-product overlay performance by identifying the underlying contributors. This is done by considering the overlay as measured on the μ-DBO targets. The mask writing, etch, scanner, and metrology contributions are being addressed. We show that the mask contribution as part of the on-product overlay budget is comparable with the overlay performance of the state-of-the-art scanner ASML NXT:2000i (≤ 1.4-nm single machine overlay, dedicated chuck, full wafer coverage) that was used in this work. The goal of this paper is to set and understand the baseline for the intra-field on-product overlay performance as measured on YS overlay targets including all its sub-contributors. This enables us to make the next step towards local placement errors for individual device structures.

Proceedings Article | 26 September 2019 Paper

Wafer alignment mark placement accuracy impact on the layer-to-layer overlay performance

Richard van Haren, Steffen Steinert, Orion Mouraille, Koen D'havé, Leon van Dijk, Jan Hermans, Dirk Beyer

Proceedings Volume 11148, 1114811 (2019) https://doi.org/10.1117/12.2536270

KEYWORDS: Optical alignment, Semiconducting wafers, Reticles, Scanners, Overlay metrology, Photomasks, Image registration, Sensors

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It has been demonstrated that the mask-to-mask overlay contribution can be fully characterized by off-line measurements on the PROVE mask registration tool. This characterization includes the impact of the marks that are used for reticle alignment inside the scanner. This is an important aspect since the scanner is blind to the features inside the image field and intra-field adjustments are only based on measurements of the reticle alignment marks. The off-line determined mask-to-mask overlay was compared with the measured on-wafer results and a perfect correlation (R² < 0.96) was found. The residual mismatch was around 0.6-nm, which is 30% of the dedicated chuck overlay performance of the scanner that was used. These results enable feed-forward corrections to the scanner to improve the intra-field overlay performance or to predict the intra-field overlay originating from mask writing errors (computational overlay). We recently extended the work to the layer-to-layer overlay impact by considering the mask writing error of a wafer alignment mark. This wafer alignment mark was exposed in the first layer. Apart from the reticle writing error of the wafer alignment mark itself, the reticle alignment contribution performed on dedicated reticle alignment marks inside the scanner plays an important role as well. The actual position of the selected wafer alignment mark is also impacted by the reticle alignment model corrections at that specific field location. Only when both contributors are considered, the layer-to-layer overlay can be predicted accurately. In this scenario, the layer-to-layer overlay is measured back to the layer in which the alignment marks were defined. This is referred to as the direct alignment use-case. In this paper, we further investigate the direct alignment use-case in relation to the layer-to-layer overlay. Apart from the reticle writing error and the reticle alignment corrections, the actual placement of the wafer alignment mark during exposure can also be affected by other applied corrections. We will present experimental results of the layer-to-layer overlay as function of the applied automated process corrections on the wafer alignment mark location printed in the first layer. It is shown that the wafer alignment sensor impact should be considered as well in the interpretation of the results. We finally present a strategy to control these kinds of overlay errors.

Proceedings Article | 27 June 2019 Paper

The impact of the reticle and wafer alignment mark placement accuracy on the intra-field mask-to-mask overlay

Richard van Haren, Steffen Steinert, Orion Mouraille, Koen D’havé, Leon van Dijk, Jan Hermans, Dirk Beyer

Proceedings Volume 11178, 111780R (2019) https://doi.org/10.1117/12.2535900

KEYWORDS: Optical alignment, Overlay metrology, Photomasks, Reticles, Semiconducting wafers, Scanners, Image registration, Sensors, Metrology, Etching

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The mask-to-mask writing error contribution as part of the on-wafer intra-field overlay performance has been extensively studied over the past few years. An excellent correlation (R² > 0.96) was found between the off-line registration measurements by the PROVE tool and the on-wafer intra-field overlay results. The residual mismatch between the offline registration measurements and the on-wafer intra-field overlay was around 0.58-nm. This value is approximately 30% of the dedicated chuck overlay performance of the scanner that was used. A careful analysis was performed to understand and quantify the two dominant underlying contributors that are responsible for the 0.58-nm mismatch. The first contributor could be attributed to the reproducibility of the reticle alignment of the scanner (~0.43-nm after 10 wafers averaging). The second contributor was assigned to the sampling difference between the PROVE registration measurement and that of the alignment sensor inside the scanner (~0.39-nm). The sampling difference is a direct result of the relatively large metrology feature (alignment mark diffraction grating) in combination with older generation e-beam mask writing tools that were used in the experiments. Local grating placement variations are averaged out when the scanner alignment sensor is used for an overlay measurement. This is due to the large spot size and the scanning principle to obtain a position. This is fundamentally different for a mask registration tool since it has been designed to perform dedicated measurements on single features (globally or in-die) across the entire mask. Previous investigations used only two sampling points for each individual alignment mark diffraction grating in order to keep the total number of measurements and time under control. It is expected that the sampling difference will significantly decrease if state-of-the-art mask e-beam writers are used and/or if the number of sampling points as measured by the PROVE will be increased. It might be obvious that the ability to perform dense off-line local registration measurements has large value to reveal local mask writing errors. The new local registration map (LRM) mode of PROVE can be used to average out local reticle writing errors enabling a more accurate placement determination of large metrology features like reticle and/or wafer alignment marks. The application of LRM can be used to further improve the accuracy between the scanner and the PROVE mask registration tool if required. So far, all published correlation studies between off-line mask registration measurements and on-wafer overlay measurements were based on TIS (Transmission Image Sensor) reticle alignment marks. In this paper, we have applied LRM to improve the placement accuracy of more advanced PARIS (Parallel ILIAS) reticle alignment marks. A comparison with on-wafer measurements is made. In addition, the placement accuracy of a wafer alignment mark is considered as well. The impact of a wafer alignment mark placement error due to reticle writing errors on the intra-field overlay is experimentally determined and discussed. This includes the effect of an applied intra-field scanner (reticle alignment) correction on the wafer alignment mark placement.

Proceedings Article | 12 June 2018 Paper

Intra-field mask-to-mask overlay, separating the mask writing from the dynamic pellicle contribution

Richard van Haren, Steffen Steinert, Orion Mouraille, Koen D’havé, Leon van Dijk, Ronald Otten, Dirk Beyer

Proceedings Volume 10807, 108070K (2018) https://doi.org/10.1117/12.2500086

KEYWORDS: Pellicles, Overlay metrology, Reticles, Scanners, Photomasks, Image registration, Semiconducting wafers, Optical alignment, Distortion, Deep ultraviolet

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The number of masks required to produce an integrated circuit has increased tremendously over the past years. The main reason for this is that a single layer mask exposure and etch was no longer sufficient to meet the required pattern density. A solution was found in the application of multi-patterning steps, including multiple masks, before the final pattern is transferred into the underlying substrate. Consequently, the mask-to-mask contribution as part of the overall on-product (intra-layer) overlay budget could not be neglected anymore. While the tight on-product overlay specifications (< 3-nm) were initially only requested for the intra-layer (e.g. multi Litho Etch Litho Etch) overlay performance, recently these tight requirements are also imposed for the layer-to-layer overlay. Recently, we reported on an extensive study in which the mask-to-mask overlay contribution as determined by the PROVE mask registration tool was correlated with actual on-wafer measurements. Two ASML BMMO (Baseliner Matched Machine Overlay) masks were used for this purpose. Initially, no pellicles were mounted onto the masks. An excellent correlation was found between the measurements on the PROVE tool and the on-wafer results reaching R² < 0.96 with an accuracy of 0.58-nm. The accuracy level can be further improved since all underlying contributors were identified. It was concluded that the expected overlay as measured on-wafer can be fully determined by off-line registration measurements only. An important note is that the off-line registration measurements on the PROVE tool are performed in a static mode, while the exposures on an ASML TWINSCANTM are performed in a dynamic (scanning) mode. No impact was observed since both masks were not equipped with a pellicle. One can expect that also for the case where both masks are equipped with a pellicle of the same type, the impact is negligible. The reason for this is that all pellicle induced errors are likely to be the same for both masks in scanning mode and will cancel out in the overlay. However, the correlation between offline mask-to-mask overlay measurements and on-wafer measurements is expected to deteriorate when only one of the masks is equipped with a pellicle. Evidence for this was already found even when we operated the scanner in slow scan mode. In this work, we have extended the study by considering the impact of a pellicle on one of the masks and how it affects the intra-field overlay. As a logical consequence, it will have an impact on the correlation between the mask-to-mask and the on-wafer overlay measurements. An experimental technique has been developed to isolate the main impact of a scanning pellicle. We show that, in addition to the mask-to-mask writing errors, the pellicle induced errors can be characterized as well. We demonstrate that the correlation is restored when the pellicle contribution is removed from the on-wafer overlay measurements. The impact of the pellicle on the intra-field overlay performance should be treated as a separate overlay contributor that needs to be minimized separately. Calibration and scanner correction capabilities are in place to mitigate the pellicle induced overlay errors.

Proceedings Article | 16 October 2017 Paper

Off-line mask-to-mask registration characterization as enabler for computational overlay

Richard van Haren, Steffen Steinert, Christian Roelofs, Orion Mouraille, Koen D’havé, Leon van Dijk, Dirk Beyer

Proceedings Volume 10451, 1045111 (2017) https://doi.org/10.1117/12.2280635

KEYWORDS: Overlay metrology, Photomasks, Metrology, Reticles, Time metrology, Optical lithography, Scanners, Image registration, Semiconductors, Optical alignment

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After the introduction of multi-patterning techniques like multiple Litho-Etch (LEⁿ ) steps and/or Spacer Assisted Double/Quadruple Patterning (SADP/SAQP), the amount of masks required to produce a semiconductor device has increased significantly. The main reason was that a functional layer could no longer be exposed in one single litho step due to the elevated pitch requirements. Consequently, the required pattern had to be split-up and divided over multiple masks. One can imagine that this has put a huge constraint on the mask-to-mask on-product overlay requirements and control. It was already shown before that for the LE² use-case the mask-to-mask contribution is the second largest contributor (after the scanner) to the overall on-product overlay. In order to keep the on-product overlay within specification over time, the number of on-wafer overlay metrology steps inside the fab increased even more. Since more masks are used per layer, multiple combinations are now possible to measure and control both the intra-layer as well as the inter-layer overlay. As a consequence, the increasing number of metrology steps has resulted in a negative impact on the overall wafer/lot cycle time in the fab. It would be beneficial to fully characterize the mask-to-mask overlay off-line and apply computational overlay techniques to compute the on-wafer overlay. This enables smart metrology sampling to address and reduce the overall wafer/lot cycle time inside the fab. In this work, we performed a correlation study between off-line mask-to-mask registration metrology and on-wafer measurements. The off-line overlay measurements were performed on a PROVE® tool while the exposures and scanner readouts were executed on an ASML TWINSCAN™. Two ASML qualification (BaseLiner) masks were used for this purpose. Extensive off-line registration measurements were performed on both reticles including the reticle alignment marks as well as the image field metrology features (gratings). We show an excellent correlation between the measurements on the PROVE® tool and the on-wafer results reaching R² < 0.96 with an accuracy of 0.58-nm. The accuracy is determined by the reticle alignment accuracy on the scanner and the quality of the masks. We have identified the underlying contributors to the error budget to enable a further improvement of the correlation between the mask-tomask and the on-wafer overlay. Since the results of this first investigation were so promising, the effect of a pellicle mounted on one of the masks was studied as well. The off-line mask-to-mask registration metrology was repeated and the resulting computational overlay has been compared with the on-wafer results.

Proceedings Article | 5 October 2016 Paper

Registration performance on EUV masks using high-resolution registration metrology

Steffen Steinert, Hans-Michael Solowan, Jinback Park, Hakseung Han, Dirk Beyer, Thomas Scherübl

Proceedings Volume 9985, 99851W (2016) https://doi.org/10.1117/12.2241498

KEYWORDS: Extreme ultraviolet, Photomasks, Metrology, Image registration, Overlay metrology, Deep ultraviolet, Reticles, Databases, Calibration, Lithography

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Proceedings Article | 8 March 2016 Paper

Co-optimization of RegC and TWINSCAN corrections to improve the intra-field on-product overlay performance

Kujan Gorhad, Ofir Sharoni, Vladimir Dmitriev, Avi Cohen, Richard van Haren, Christian Roelofs, Hakki Ergun Cekli, Emily Gallagher, Philippe Leray, Dirk Beyer, Thomas Trautzsch, Steffen Steinert

Proceedings Volume 9778, 97783D (2016) https://doi.org/10.1117/12.2219291

KEYWORDS: Semiconducting wafers, Scanners, Reticles, Overlay metrology, Image processing, Process control, Lithography, Yield improvement, Chemical elements, Photomasks, Actuators, Image registration, Metrology, Lithium

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Improving wafer On Product Overlay (OPO) is becoming a major challenge in lithography, especially for multipatterning techniques like N-repetitive Litho-Etch steps (LE^N, N ≥ 2). When using different scanner settings and litho processes between inter-layer overlays, intra-field overlay control becomes more complicated. In addition to the Image Placement Error (IPE) contribution, the TWINSCAN^TM lens fingerprint in combination with the exposure settings is playing a significant role as well. Furthermore the scanner needs to deal with dynamic fingerprints caused by for instance lens and/or reticle heating.

This paper will demonstrate the complementary RegC^® and TWINSCAN^TM solution for improving the OPO by cooptimizing the correction capabilities of the individual tools, respectively. As a consequence, the systematic intra-field fingerprints can be decreased along with the overlay (OVL) error at wafer level. Furthermore, the application could be utilized for extending some of the scanner actuators ranges by inducing a pre-determined signatures. These solutions perfectly fit into the ASML Litho InSight (LIS) product in which feedforward and feedback corrections based on YieldStar overlay and other measurements are used to improve the OPO. While the TWINSCAN^TM scanner corrects for global distortions (up to third order) - scanner Correctable Errors ( CE), the RegC^® application can correct for the None Correctable Errors (NCE) by making the high frequency NCE into a CE with low frequency nature. The RegC^® induces predictable deformation elements inside the quartz (Qz) material of the reticle, and by doing so it can induce a desired pre-defined signature into the reticle. The deformation introduced by the RegC^® is optimized for the actual wafer print taking into account the scale and ortho compensation by the scanner, to correct for the systematic fingerprints and the wafer overlay. These two applications might be very powerful and could contribute to achieve a better OPO performance.

Proceedings Article | 17 October 2014 Paper

On the benefit of high resolution and low aberrations for in-die mask registration metrology

Dirk Beyer, Dirk Seidel, Sven Heisig, Steffen Steinert, Susanne Töpfer, Thomas Scherübl, Jochen Hetzler

Proceedings Volume 9235, 92351S (2014) https://doi.org/10.1117/12.2069925

KEYWORDS: Photomasks, Image registration, Metrology, Image analysis, Charge-coupled devices, Overlay metrology, Lithography, Optical lithography, Lithographic illumination, CCD image sensors

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