Dr. Yi-sha Ku Profile

Dr. Yi-sha Ku

Senior Principal Researcher at Industrial Technology Research Institute

SPIE Involvement:

Conference Program Committee | Author

Area of Expertise:

optical metrology , overlay , modeling and algorithm , advanced lithography , measurement standard , 3D interconnect

Profile Summary

Interests: Metrology technologies, modeling, algorithm and applications for advanced lithography and manufacturing.

Inventor of in-chip overlay metrology, which has been adopted worldwide and are regarded as essential for the most advanced semiconductor processes. Evaluated optimal printing parameters and established appropriate methodologies, demonstrated the effectiveness on 45/55/65 nm node production wafer at TSMC.

Lead metrology-process integration in ITRI-TSMC-Nanometrics joint develop project of in-chip overlay metrology. Developed 2D/3D image formation model to optimize the overlay target design for specific process layers. Developed image asymmetric algorithm to determine overlay with nanometer sensitivity.

Developed optical metrology for advanced manufacturing industry at ITRI. Collaborated on overlay metrology with TSMC/IBM/AMD/Nanometrics, established effective performance metrics.

Managed broadband spectral reflectometry research and applications for determining high aspect ratio TSV (Through Silicon Vias) depth and bottom shape. Enabled 3D interconnect metrology market penetration and new system sales.

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Publications (37)

Proceedings Article | 20 March 2020 Presentation + Paper

Presentation + Paper

EUV scatterometer with multiple orders of high-harmonic generation

Y. Ku, W. Wang, Y. Chen, M. Chang, C. Yeh, C. Lo

Proceedings Volume 11325, 1132518 (2020) https://doi.org/10.1117/12.2552218

KEYWORDS: Diffraction, Diffraction gratings, Extreme ultraviolet, Sensors, Charge-coupled devices, CCD cameras, Laser scattering, Scatterometry, Metrology, CCD image sensors

Read Abstract +

SPIE Journal Paper | 24 February 2018 Open Access

Open Access

Development of extreme ultraviolet scatterometer using multiple orders of high-harmonic generation

Yi-Sha Ku, Wei-Ting Wang, Yi-Chang Chen, Ming-Chang Chen, Chia-Liang Yeh, Chun-Wei Lo

JM3, Vol. 17, Issue 01, 014001, (February 2018) https://doi.org/10.1117/12.10.1117/1.JMM.17.1.014001

KEYWORDS: Diffraction, Diffraction gratings, Extreme ultraviolet, Sensors, Charge-coupled devices, CCD cameras, Laser scattering, CCD image sensors, Scatterometry, Scanning electron microscopy

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Proceedings Article | 20 August 2015 Paper

Paper

Development of EUV scatterometer with high-harmonic-generation EUV source for nano-scale grating measurement

Chia-Liang Yeh, Yi-Sha Ku, Yi-Chen Hsieh, Chia-Hung Cho

Proceedings Volume 9556, 95561F (2015) https://doi.org/10.1117/12.2194234

KEYWORDS: Extreme ultraviolet, Diffraction gratings, Diffraction, Metrology, Databases, Light sources, 3D metrology, Algorithms, Mirrors, CCD cameras

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Proceedings Article | 22 June 2015 Paper

Paper

Wafer warpage characterization measurement with modified fringe reflection method

Po-Yi Chang, Yi-Sha Ku

Proceedings Volume 9525, 952528 (2015) https://doi.org/10.1117/12.2184699

KEYWORDS: Semiconducting wafers, Reflection, Wafer-level optics, Mirrors, Sapphire, Fringe analysis, Error analysis, LCDs, Calibration, Image sensors

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SPIE Journal Paper | 25 March 2014 Open Access

Open Access

Special Section Guest Editorial: Metrology and Inspection for 3-D Integrated Circuits and Interconnects

Alexander Starikov, Yi-Sha Ku

JM3, Vol. 13, Issue 01, 011201, (March 2014) https://doi.org/10.1117/12.10.1117/1.JMM.13.1.011201

KEYWORDS: Metrology, Inspection, 3D metrology, Process control, Integrated circuits, 3D modeling, Manufacturing, Roads, Standards development, Control systems

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SPIE Journal Paper | 6 March 2014 Open Access

Open Access

Spectral reflectometry for metrology of three-dimensional through-silicon vias

Yi-Sha Ku

JM3, Vol. 13, Issue 01, 011209, (March 2014) https://doi.org/10.1117/12.10.1117/1.JMM.13.1.011209

KEYWORDS: Reflectivity, Reflectometry, Semiconducting wafers, 3D metrology, Metrology, Oxides, Scanning electron microscopy, Silicon, Etching, Calibration

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Proceedings Article | 13 May 2013 Paper

Paper

Metrology for adhesive layer of temporary bonding wafers using IR interferometry

Po-Yi Chang, Yi-Sha Ku, Chia-Hung Cho

Proceedings Volume 8788, 878804 (2013) https://doi.org/10.1117/12.2020437

KEYWORDS: Adhesives, Semiconducting wafers, Interferometry, Phase shifts, Infrared cameras, Wafer bonding, Infrared imaging, Interference filters, Calibration, Metrology

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Proceedings Article | 13 May 2013 Paper

Paper

Infrared differential interference contrast microscopy for overlay metrology on 3D-interconnect bonded wafers

Yi-sha Ku, Deh-Ming Shyu, Yeou-Sung Lin, Chia-Hung Cho

Proceedings Volume 8788, 87881Z (2013) https://doi.org/10.1117/12.2021039

KEYWORDS: Semiconducting wafers, Overlay metrology, Wafer bonding, Digital image correlation, Microscopy, Prisms, Microscopes, Infrared radiation, Silicon, Error analysis

Read Abstract +

Overlay metrology for stacked layers will be playing a key role in bringing 3D IC devices into manufacturing. However, such bonded wafer pairs present a metrology challenge for optical microscopy tools by the opaque nature of silicon. Using infrared microscopy, silicon wafers become transparent to the near-infrared (NIR) wavelengths of the electromagnetic spectrum, enabling metrology at the interface of bonded wafer pairs. Wafers can be bonded face to face (F2F) or face to back (F2B) which the stacking direction is dictated by how the stacks are carried in the process and functionality required. For example, Memory stacks tend to use F2B stacking enables a better managed design. Current commercial tools use single image technique for F2F bonding overlay measurement because depth of focus is sufficient to include both surfaces; and use multiple image techniques for F2B overlay measurement application for the depth of focus is no longer sufficient to include both stacked wafer surfaces. There is a need to specify the Z coordinate or stacking wafer number through the silicon when visiting measurement wafer sites. Two shown images are of the same (X, Y) but separate Z location acquired at focus position of each wafer surface containing overlay marks. Usually the top surface image is bright and clear; however, the bottom surface image is somewhat darker and noisier as an adhesive layer is used in between to bond the silicon wafers. Thus the top and bottom surface images are further processed to achieve similar brightness and noise level before merged for overlay measurement. This paper presents a special overlay measurement technique, using the infrared differential interference contrast (DIC) microscopy technique to measure the F2B wafer bonding overlay by a single shot image. A pair of thinned wafers at 50 and 150 μm thickness is bonded on top of a carrier wafer to evaluate the bonding overlay. It works on the principle of interferometry to gain information about the optical path length of the stacked wafers, to enhance the image contrast of overlay marks features even though they are locating in different Z plane. A two dimensional mirror-symmetric overlay marks for both top and bottom processing wafers is designed and printed in each die in order to know and realize the best achievable wafer to wafer bonding processing. A self-developed analysis algorithms is used to identify the overlay error between the stacking wafers and the interconnect structures. The experimental overlay results after wafer bonding including inter-die and intra-die analysis results will be report in the full paper. Correlation of overlay alignment offset data to electrical yield, provides an early indication of bonded wafer yield.

SPIE Journal Paper | 1 October 2012

Experimental investigation of three-dimensional interconnect processing wafers

Yi-sha Ku, Po-Yi Chang, Chris Shen

JM3, Vol. 11, Issue 4, 043002, (October 2012) https://doi.org/10.1117/12.10.1117/1.JMM.11.4.043002

KEYWORDS: Semiconducting wafers, Metals, Copper, Silicon, Silicon films, Sensors, Capacitance, Annealing, 3D metrology, Temperature metrology

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Proceedings Article | 6 April 2012 Paper

Paper

Measurement of through silicon via etch profile by dark-field optical microscope

Deh-Ming Shyu, Yi-sha Ku

Proceedings Volume 8324, 832414 (2012) https://doi.org/10.1117/12.916370

KEYWORDS: Optical microscopes, Scanning electron microscopy, Etching, Silicon, Image processing, Microscopes, Objectives, Algorithm development, Semiconducting wafers, Metrology

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Proceedings Article | 5 April 2012 Paper

Paper

Wafer level warpage characterization of 3D interconnect processing wafers

Po-Yi Chang, Yi-Sha Ku

Proceedings Volume 8324, 832415 (2012) https://doi.org/10.1117/12.916591

KEYWORDS: Semiconducting wafers, Fringe analysis, Reflection, 3D metrology, Metrology, Mirrors, Wafer bonding, Phase shifts, CCD cameras, Interferometers

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Proceedings Article | 3 April 2012 Paper

Paper

In-line metrology of 3D interconnect processes

Y. Ku, D. Shyu, P. Chang, W. Hsu

Proceedings Volume 8324, 832411 (2012) https://doi.org/10.1117/12.915810

KEYWORDS: Semiconducting wafers, Metrology, 3D metrology, Silicon, Reflectivity, Copper, Metals, Infrared imaging, Confocal microscopy, Reflectometry

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Proceedings Article | 27 May 2011 Paper

Paper

Reflectometry for TSV etching depth inspection

Wei-Te Hsu, Yi-Sha Ku

Proceedings Volume 8082, 808226 (2011) https://doi.org/10.1117/12.889238

KEYWORDS: Reflectometry, Thin films, Etching, Reflectivity, Scanning electron microscopy, Reflection, Inspection, Silicon, Spectroscopy, Metrology

Read Abstract +

TSV (Through Silicon Via) is a vertical via that passes through a silicon wafer or chip. This technology is a major enabler for three-dimensional integrated circuits (3D ICs) of stacking different functional chips. Vertical stacking chips of 3D ICs allows gates to be placed closer and thereby provides more computing process in a compact space. As TSV technique with unique processing steps that are not used in standard 2D ICs, a number of new parameters need to be measured and controlled. TSV etching depth is a critical parameter for ensuring the performance of 3D ICs, thus metrology and inspection of the TSV etching depth are very profitability of the overall manufacturing process. Spectroscopic reflectometry (SR) is currently being used in industry to measure the internal reflectance of thin films, from which the thickness and other properties can be obtained. It is a non-contact and non-destructive in-line metrology tool. In this study, we demonstrate the use of SR by employing the fast Fourier transform (FFT) algorithm for measuring the etching via depth and the thickness of oxide layer in one shot measurement. First, the specifications of reflectometer system, such as spectral range and resolution of spectrometer for depth analysis are discussed. The depth resolution is better in the longer measuring spectral range, thus small difference of TSVs' depth can be well distinguished. The spectrometer with high resolution is used to collect the authentic spectrum from etching depth with high aspect ratio. We verified our system through a mutual measurement comparison with the national standard traceable step height system. Our system is capable of measuring step height up to 100 um and measurement precision is in the range of 0.6 um. In this report, TSV arrays with nominal CD 5~25 um, and aspect ratio up to 10 are measured. Metrology results from actual 3D interconnect processing wafers indicate our system provides excellent correlation to cross-section scanning electron microscope (SEM) measurement results. The maximum discrepancy between each other is smaller than 1 um.

Proceedings Article | 27 May 2011 Paper

Paper

3D interconnect metrology in CMS/ITRI

Y. S. Ku, D. M. Shyu, W. T. Hsu, P. Y. Chang, Y. C. Chen, H. L. Pang

Proceedings Volume 8082, 80820I (2011) https://doi.org/10.1117/12.889401

KEYWORDS: Semiconducting wafers, Silicon, Copper, 3D metrology, Metrology, Confocal microscopy, Reflectivity, Microscopes, Metals, Annealing

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SPIE Journal Paper | 1 December 2009

Accuracy of diffraction-based overlay metrology using a single array target

Yi-sha Ku, Hsiu-Lan Pang, Wei-Te Hsu, Deh-Ming Shyu

OE, Vol. 48, Issue 12, 123601, (December 2009) https://doi.org/10.1117/12.10.1117/1.3275449

KEYWORDS: Overlay metrology, Diffraction, Scatterometry, Scatter measurement, Critical dimension metrology, Optical engineering, Detection and tracking algorithms, Diffraction gratings, Photoresist materials, Semiconductors

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Proceedings Article | 10 September 2009 Paper

Paper

A novel method for overlay measurement by scatterometry

Wei-Te Hsu, Yi-Sha Ku, Deh-Ming Shyu

Proceedings Volume 7432, 74320F (2009) https://doi.org/10.1117/12.825091

KEYWORDS: Overlay metrology, Diffraction, Scatterometry, Diffraction gratings, Microscopes, Metrology, Imaging systems, Fresnel lenses, Scatter measurement, Reflectivity

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Proceedings Article | 21 August 2009 Paper

Paper

Improved diffraction-based overlay metrology by use of two dimensional array target

Yi-Sha Ku, Hsiu-Lan Pang, Weite Hsu, Deh-Ming Shyu

Proceedings Volume 7405, 74050C (2009) https://doi.org/10.1117/12.825524

KEYWORDS: Overlay metrology, Diffraction, Scatterometry, Signal processing, Critical dimension metrology, Photoresist materials, Diffraction gratings, Scatter measurement, Electromagnetism, Model-based design

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Proceedings Article | 24 March 2009 Paper

Paper

Angle-resolved scatterfield microscope for linewidth measurement

Deh-Ming Shyu, Yi-sha Ku, Wei-Te Hsu

Proceedings Volume 7272, 72721L (2009) https://doi.org/10.1117/12.813982

KEYWORDS: Spatial light modulators, Objectives, Fresnel lenses, Modulation, Silicon, Phase modulation, Microscopes, Relays, Optical microscopes, Metrology

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Proceedings Article | 29 August 2008 Paper

Paper

Optimal measurement method for diffraction-based overlay metrology

Wei-Te Hsu, Yi-Sha Ku

Proceedings Volume 7066, 70660L (2008) https://doi.org/10.1117/12.793185

KEYWORDS: Overlay metrology, Diffraction gratings, Diffraction, Critical dimension metrology, Reflectivity, Metrology, Scatterometry, Silicon, Signal processing, Optical design

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SPIE Journal Paper | 1 August 2008

Optimal measurement method for scatterometer-based overlay metrology

Yi-Sha Ku, Weite Hsu, Sen-Yih Chou, Deh-Ming Shyu

OE, Vol. 47, Issue 08, 083604, (August 2008) https://doi.org/10.1117/12.10.1117/1.2969120

KEYWORDS: Overlay metrology, Diffraction, Diffraction gratings, Scatterometry, Scatter measurement, Signal processing, Optical design, Optical engineering, Critical dimension metrology, Reflectivity

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Proceedings Article | 22 March 2008 Paper

Paper

Overlay measurement based on dual-overlay grating image

Deh-Ming Shyu, Yi-sha Ku, Shu-Ping Dong

Proceedings Volume 6922, 69220Q (2008) https://doi.org/10.1117/12.772388

KEYWORDS: Overlay metrology, Image analysis, Diffraction gratings, Metrology, Objectives, Optical filters, Optical imaging, Process control, Image resolution, Diffraction

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Proceedings Article | 18 June 2007 Paper

Paper

In-chip overlay metrology for 45nm processes

Y. S. Ku, H. L. Pang, N. P. Smith, L. Binns

Proceedings Volume 6617, 66170X (2007) https://doi.org/10.1117/12.726051

KEYWORDS: Overlay metrology, Calibration, Semiconducting wafers, Image processing, Data modeling, Mathematical modeling, Process control, Printing, Reticles, Wafer testing

Read Abstract +

The feasibility of measuring overlay using small (between 1x1&mgr;m and 3x3&mgr;m total size) targets has been demonstrated⁴. The symmetry of the image of isolated test features changes with overlay offset. The targets are small enough to be positioned within active areas of the device, and total measurement uncertainty (TMU) is sufficient to allow these targets to be used in characterizing overlay variations in the active device. In this paper we describe further development of this technique and its application to overlay control in 45nm processes. A simple image model has been used to predict how the target images change with overlay error, and to study the unwanted effects of process variation on the measurement. In order to ensure the accuracy of measurements made using the in-chip targets it is necessary to provide for dynamic calibration of the symmetry-to-overlay response. This calibration can be readily achieved by printing multiple targets close together, with each target having a programmed offset that differs by a small amount. In our tests we have used triplets of targets with programmed offsets of 30nm, 50nm and 70nm. Normal targets are printed with a programmed offset of 50nm. A test reticle was designed for double-pass printing of a range of in-chip targets with different sizes and component dimensions, and with designed overlay offsets of 0nm to 100nm in 4nm steps. Standard bar-in-bar targets were printed with every in-chip target to allow the change of symmetry with overlay to be measured directly. Wafers were printed using a 45nm process poly-to-STI stack. Measurements were made in multiple fields and from multiple wafers using an unmodified Nanometrics Caliper élan overlay tool. The test wafers were printed with extremes of process variation. Correlation of the measured image symmetry to the programmed offset under different process conditions shows that the response is sensitive to film changes, as predicted by the image model. Results from production wafers show that the effect of normal process variation is small enough that calibration is not necessary at every location. Placing a few calibration targets in the scribe lines of the device is more than sufficient, allowing the smallest possible space requirement for measurement inside the active area of the device. Detailed study of the change in overlay with programmed offset along a line of test samples with the same design properties shows short-scale variations of order 1-5nm. According to the 2005 ITRS¹ these variations account for nearly 50% of the overlay budget for a 45nm process. This effect cannot be described by any model where overlay variations are purely a mathematical function of position, and in process control at this node it will become necessary to use characterization of overlay by measurement instead of models.

Proceedings Article | 5 April 2007 Paper

Paper

Through-focus technique for overlay metrology

An-Shun Liu, Yi-Sha Ku, Nigel Smith

Proceedings Volume 6518, 65182X (2007) https://doi.org/10.1117/12.712030

KEYWORDS: Overlay metrology, Image sensors, Metrology, Algorithm development, Optical imaging, Error analysis, Optical design, Image analysis, Detection and tracking algorithms, Silicon

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Proceedings Article | 5 April 2007 Paper

Paper

Angular scatterometry for line-width roughness measurement

Deh-Ming Shyu, Yi-Sha Ku, Nigel Smith

Proceedings Volume 6518, 65184G (2007) https://doi.org/10.1117/12.711734

KEYWORDS: Line width roughness, Scatterometry, Amplifiers, Diffraction gratings, Calibration, Semiconductors, Light scattering, Reflectivity, Diffraction, Light sources

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Proceedings Article | 5 April 2007 Paper

Paper

In-chip overlay metrology of 45nm and 55nm processes

Y. S. Ku, C. H. Tung, Y. P. Li, H. L. Pang, C. M. Ke, Y. H. Wang, D. C. Huang, N. P. Smith, L. Binns

Proceedings Volume 6518, 65182V (2007) https://doi.org/10.1117/12.713075

KEYWORDS: Overlay metrology, Semiconducting wafers, Calibration, Data modeling, Mathematical modeling, Wafer testing, Reticles, Tolerancing, Error analysis, Process control

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SPIE Journal Paper | 1 December 2006

Through-focus technique for grating linewidth analysis with nanometer sensitivity

Yi-Sha Ku, An-Shun Liu, Nigel Smith

OE, Vol. 45, Issue 12, 123602, (December 2006) https://doi.org/10.1117/12.10.1117/1.2404959

KEYWORDS: Critical dimension metrology, Data modeling, Optical engineering, Detection and tracking algorithms, Systems modeling, Semiconducting wafers, Overlay metrology, Metrology, Image quality, Imaging systems

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Proceedings Article | 24 March 2006 Paper

Paper

Influence of semiconductor manufacturing process variation on device parameter measurement for angular scatterometry

Shih-Chun Wang, Yi-Sha Ku, Deh-Ming Shyu, Chun-Hung Ko, Nigel Smith

Proceedings Volume 6152, 61521J (2006) https://doi.org/10.1117/12.655995

KEYWORDS: Critical dimension metrology, Scatterometry, Refractive index, Scatter measurement, Optical properties, Measurement devices, Reflectivity, Semiconductor manufacturing, Process control, Metrology

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The influence of semiconductor manufacturing process variation on device parameter measurements for angular scatterometry was studied. Process variations, e.g, temperature and pressure variation of poly deposition, are considered to affect the optical properties of the deposition layer, and hence cause inaccurate model-based scatterometry measurements. This study investigates measurement error of device parameters if the optical properties change but the model stays for the same in angular scatterometry. A series of diffracted signatures was generated whose optical properties change slightly but keep the same structure. This work measured n (refractive index) and k (extinction index) of materials on wafer from the nominal process condition. Then, n and k are used to create a comparison library. The comparison library fixes all parameters other than varying CD (critical dimension) parameter. When poly layer n changes, the scattering signatures also change. The inaccuracy of CD measurement could be evaluated by comparing varying signatures due to optical properties change to the nominal process condition. An optimal structure design and feature region selection algorithm was developed to reduce errors introduced by these process variations to CD measurement. For angular scatterometry, the reflectance at some scan angles performs lower sensitivity to the optical parameters variation than the reflectance at other scan angles. By determining which scan angles contain less sensitivity and further optimize target design within the process variation range, the influence of process variation on device parameter measurement and the number of measurements used in the inversion process can be reduced. By using 65nm and 45nm as design rules, optimized grating structure with most sensitivity to CD measurement and the least influence on poly refractive index variation were obtained. The optimized grating structures are suitable for inline semiconductor process control of CD measurement for scatterometry.

Proceedings Article | 24 March 2006 Paper

Paper

Correlation of scatterometry sensitivities to variation in device parameters

Chun-Hung Ko, Yi-sha Ku, Nigel Smith

Proceedings Volume 6152, 615220 (2006) https://doi.org/10.1117/12.656147

KEYWORDS: Critical dimension metrology, Neural networks, Evolutionary algorithms, Scatterometry, Detection and tracking algorithms, Reflectivity, Target detection, Model-based design, Instrument modeling, Scatter measurement

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Proceedings Article | 24 March 2006 Paper

Paper

Image-based nanoscale dimensional metrology

An-Shun Liu, Yi-Sha Ku, Nigel Smith

Proceedings Volume 6152, 61522G (2006) https://doi.org/10.1117/12.655932

KEYWORDS: Critical dimension metrology, Metrology, Detection and tracking algorithms, Image sensors, Optical imaging, Optical metrology, Dimensional metrology, Data modeling, Silicon, Objectives

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Proceedings Article | 24 March 2006 Paper

Paper

In-chip overlay metrology

Y. Ku, C. Tung, Y. Li, H. Pang, N. Smith, L. Binns, T. Rigden, G. Reynolds, H. Fink

Proceedings Volume 6152, 615214 (2006) https://doi.org/10.1117/12.655953

KEYWORDS: Overlay metrology, Data modeling, Scanning electron microscopy, Image processing, Process control, Image resolution, Semiconducting wafers, Tolerancing, Lithography, Image acquisition

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Proceedings Article | 15 September 2005 Paper

Paper

Method of characteristic signatures matching through discrepancy-enhanced library generation process

Shih-Chun Wang, Yi-Sha Ku, Chun-Hung Ko, Nigel Smith

Proceedings Volume 5908, 59081D (2005) https://doi.org/10.1117/12.616383

KEYWORDS: Light scattering, Scatterometry, Inverse optics, Diffraction, Metrology, Scattering, Critical dimension metrology, Diffraction gratings, Overlay metrology, Optical testing

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Proceedings Article | 10 September 2005 Paper

Paper

Through-focus algorithm to improve overlay tool performance

An-Shun Liu, Yi-Sha Ku, Nigel Smith

Proceedings Volume 5908, 59081E (2005) https://doi.org/10.1117/12.616422

KEYWORDS: Overlay metrology, Critical dimension metrology, Detection and tracking algorithms, Optical design, Computer aided design, Metrology, Charge-coupled devices, Algorithm development, Objectives, Optical filters

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Proceedings Article | 10 May 2005 Paper

Paper

Improved thin film model for overlay metrology

Chi-Hong Tung, Yi-Sha Ku, An-Shun Liu, Nigel Smith

Proceedings Volume 5752, (2005) https://doi.org/10.1117/12.599274

KEYWORDS: Overlay metrology, Thin films, Silicon, Silicon films, 3D modeling, Optical simulations, Diffraction gratings, Reflectivity, Diffraction, Optical filters

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Proceedings Article | 10 May 2005 Paper

Paper

Performance study of CD mark size for angular scatterometry

Yi-sha Ku, Ding-Sheng Pan, Shih-Chun Wang, C. Tung, Chun-Hung Ko, Sheng-Hua Lu, Nigel Smith

Proceedings Volume 5752, (2005) https://doi.org/10.1117/12.599188

KEYWORDS: Scattering, Scatterometry, Critical dimension metrology, Laser scattering, Overlay metrology, Light scattering, Scatter measurement, Optical design, Interference (communication), Semiconducting wafers

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Proceedings Article | 10 May 2005 Paper

Paper

A study of novel overlay targets designs

Yi-Sha Ku, An-Shan Liu, Nigel Smith

Proceedings Volume 5752, (2005) https://doi.org/10.1117/12.598373

KEYWORDS: Semiconducting wafers, Data modeling, Overlay metrology, Detection and tracking algorithms, Optical design, Wafer testing, Silicon, Diffraction gratings, Wafer-level optics, Process control

Read Abstract +

Proceedings Article | 10 May 2005 Paper

Paper

Comparisons of overlay measurement using conventional bright-field microscope and angular scatterometer

Chun-Hung Ko, Yi-sha Ku, Nigel Smith, Deh-Ming Shyu, Shih-Chun Wang, Sheng-Hua Lu

Proceedings Volume 5752, (2005) https://doi.org/10.1117/12.599306

KEYWORDS: Overlay metrology, Microscopes, Reflectance spectroscopy, Reflectivity, Scatterometry, Silicon, Metrology, Spectroscopy, Diffraction gratings, Light

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Proceedings Article | 10 May 2005 Paper

Paper

In-chip overlay measurement by existing bright-field imaging optical tools

Yi-Sha Ku, Chi-Hong Tung, Nigel Smith

Proceedings Volume 5752, (2005) https://doi.org/10.1117/12.599054

KEYWORDS: Overlay metrology, Semiconducting wafers, Lithography, Silicon, Optical imaging, Image resolution, Imaging systems, Quality measurement, Detection and tracking algorithms, Integrated optics

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Showing 5 of 37 publications

Conference Committee Involvement (16)

Metrology, Inspection, and Process Control XXXIX

24 February 2025 | San Jose, California, United States

Metrology, Inspection, and Process Control XXXVIII

26 February 2024 | San Jose, California, United States

Metrology, Inspection, and Process Control XXXVII

27 February 2023 | San Jose, California, United States

Metrology, Inspection, and Process Control XXXVI

25 April 2022 | San Jose, California, United States

Metrology, Inspection, and Process Control for Semiconductor Manufacturing XXXV

22 February 2021 | Online Only, California, United States

Metrology, Inspection, and Process Control for Microlithography XXXIV

24 February 2020 | San Jose, California, United States

Metrology, Inspection, and Process Control for Microlithography XXXIII

25 February 2019 | San Jose, California, United States

Metrology, Inspection, and Process Control for Microlithography XXXII

26 February 2018 | San Jose, California, United States

Metrology, Inspection, and Process Control for Microlithography XXXI

27 February 2017 | San Jose, California, United States

Metrology, Inspection, and Process Control for Microlithography XXX

22 February 2016 | San Jose, California, United States

Metrology, Inspection, and Process Control for Microlithography XXIX

23 February 2015 | San Jose, California, United States

Metrology, Inspection, and Process Control for Microlithography XXVIII

24 February 2014 | San Jose, California, United States

Metrology, Inspection, and Process Control for Microlithography XXVII

25 February 2013 | San Jose, California, United States

Metrology, Inspection, and Process Control for Microlithography XXVI

13 February 2012 | San Jose, California, United States

Metrology, Inspection, and Process Control for Microlithography XXV

28 February 2011 | San Jose, California, United States

Metrology, Inspection, and Process Control for Microlithography XXIV

22 February 2010 | San Jose, California, United States

Showing 5 of 16 Conference Committees

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