Articles

Design intent application to tolerance-based manufacturing system

[+] Author Affiliations
Soichi Inoue

Toshiba Corporation, Advanced Lithography Process Technology Department, Device Process Development Center, Corporate Research & Development Center, 8, Shinsugita-cho, Isogo-ku, Yokohama City, Kanagawa-Pref 235-8522, Japan

Koji Nakamae

Osaka University, Graduate School of Information Science and Technology, 2-1 Yamada-oka Suita-shi, Osaka, Japan

J. Micro/Nanolith. MEMS MOEMS. 10(1), 013020 (March 18, 2011). doi:10.1117/1.3565449
History: Received March 31, 2010; Revised January 27, 2011; Accepted February 09, 2011; Published March 18, 2011; Online March 18, 2011
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Continuous shrinkage of the design rule in large-scale integrated circuit devices brings about greater difficulty in the manufacturing process. The keys to meeting small process margin are adequate extraction of critical dimension tolerance for each object, considering design intent in terms of electrical behavior, and assigning the tolerance for each process step. However, once the design data are converted to layout data and signed off, most of the design intent is abandoned and unrecognized in the process phase. Thus, uniform and redundant tolerance is used, and therefore, excess tolerance is assigned for some layouts. To solve the problem described above, a tolerance-based manufacturing system utilizing flexible layout-dependent speculation derived from design intent has been discussed. Using a 40-nm node test chip, electrically critical spots, such as timing, cross-talk noise, electromigration, with small margins are extracted, assigned to the physical layout, and utilized in the manufacturing process. The flow is applicable for optical proximity effect correction (OPC) turnaround time reduction, optimization of OPC/lithography compliance check (LCC) specification, and failure-analysis acceleration. Consequently, a design-intent-aware manufacturing system is promising for realizing proper process specifications and computational cost reduction, in addition to yield enhancement.

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© 2011 Society of Photo-Optical Instrumentation Engineers (SPIE)

Topics

Manufacturing

Citation

Sachiko Kobayashi ; Satoshi Tanaka ; Suigen Kyoh ; Shimon Maeda ; Masanari Kajiwara, et al.
"Design intent application to tolerance-based manufacturing system", J. Micro/Nanolith. MEMS MOEMS. 10(1), 013020 (March 18, 2011). ; http://dx.doi.org/10.1117/1.3565449


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