Lithography

Topology-oriented pattern extraction and classification for synthesizing lithography test patterns

[+] Author Affiliations
Seongbo Shim

Korea Advanced Institute of Science and Technology, Department of Electrical Engineering, 291 Daehak-ro, Yuseong-gu, Daejeon 305-701, Republic of Korea

Samsung Electronics, San #16, Banwol-dong, Hwasung 445-701, Republic of Korea

Youngsoo Shin

Korea Advanced Institute of Science and Technology, Department of Electrical Engineering, 291 Daehak-ro, Yuseong-gu, Daejeon 305-701, Republic of Korea

J. Micro/Nanolith. MEMS MOEMS. 14(1), 013503 (Jan 23, 2015). doi:10.1117/1.JMM.14.1.013503
History: Received May 29, 2014; Accepted December 23, 2014
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Abstract.  A small but diverse set of test patterns is essential for the optimization of lithography parameters. We selectively extract the complicated patterns that are likely to cause lithography defects from test layouts. These patterns are hierarchically classified into groups based on geometric similarity; then, a small number of patterns are chosen to represent each group. We demonstrate this approach in the synthesis of test patterns for metal layers. The total area of the resulting test patterns is only 10% of that of a set produced using a more conventional technique; the resulting hotspot library has 30% fewer patterns, and the time required to create it is cut by an order of magnitude.

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© 2015 Society of Photo-Optical Instrumentation Engineers

Citation

Seongbo Shim and Youngsoo Shin
"Topology-oriented pattern extraction and classification for synthesizing lithography test patterns", J. Micro/Nanolith. MEMS MOEMS. 14(1), 013503 (Jan 23, 2015). ; http://dx.doi.org/10.1117/1.JMM.14.1.013503


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