Optimal SRAF placement for process window enhancement in 65-nm/45-nm technology

Chandra Sarma; Klaus Herold; Christoph Noelscher; Paul Schroeder

doi:10.1117/12.711480

26 March 2007 Optimal SRAF placement for process window enhancement in 65-nm/45-nm technology

Chandra Sarma, Klaus Herold, Christoph Noelscher, Paul Schroeder

Proceedings Volume 6520, Optical Microlithography XX; 65202B (2007) https://doi.org/10.1117/12.711480
Event: SPIE Advanced Lithography, 2007, San Jose, California, United States

Abstract

The existence of pitch range with depth of focus below a sustainable limit is a well known fact in lithography. Such 'forbidden pitch' range limits designers' ability to pack more functionality in a logic chip. One of the ways to increase the process window is to have a careful placement of SRAFs (Sub Resolution Assist Features) that can boost process window across the pitch range. However the standard SRAF strategy that has been followed historically is not always able to increase the process window of these 'forbidden pitches' sufficiently to allow sustainable manufacturing. With shrinking technology node, placement of SRAF is becoming rather difficult due to space limitations between concerned features and mask house's ability to manufacture mask with small assist features and smaller aspect ratios. In many cases the number of SRAF that can be inserted between main features in a symmetrical way is not enough to boost the process window. In this paper we discuss how asymmetrical placement of SRAF can increase process window for critical feature in layouts where such critical features are placed near not-so-critical patterns. We also discuss how such concepts can be extended to an array of critical features, where one SRAF is placed near a critical feature instead of placing them in the center. We finally demonstrate how wafer data confirm process window boost from such asymmetrical placement of SRAFs in gate layer for 65nm. We also show how to determine the optimal placement of SRAF in such cases and recommend some rules that can be used for 45nm node based on such results.

Citation Download Citation

Chandra Sarma, Klaus Herold, Christoph Noelscher, and Paul Schroeder "Optimal SRAF placement for process window enhancement in 65-nm/45-nm technology", Proc. SPIE 6520, Optical Microlithography XX, 65202B (26 March 2007); https://doi.org/10.1117/12.711480

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KEYWORDS

SRAF

Photomasks

Tolerancing

Printing

Semiconducting wafers

Manufacturing

Lithography

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