Paper
17 March 2015 Dry etch challenges for CD shrinkage in memory process
Takaya Matsushita, Takanori Matsumoto, Hidefumi Mukai, Suigen Kyoh, Kohji Hashimoto
Author Affiliations +
Abstract
Line pattern collapse attracts attention as a new problem of the L&S formation in sub-20nm H.P feature. Line pattern collapse that occurs in a slight non-uniformity of adjacent CD (Critical dimension) space using double patterning process has been studied with focus on micro-loading effect in Si etching. Bias RF pulsing plasma etching process using low duty cycle helped increase of selectivity Si to SiO2. In addition to the effect of Bias RF pulsing process, the thin mask obtained from improvement of selectivity has greatly suppressed micro-loading in Si etching. However it was found that micro-loading effect worsen again in sub-20nm space width. It has been confirmed that by using cycle etch process to remove deposition with CFx based etching micro-loading effect could be suppressed. Finally, Si etching process condition using combination of results above could provide finer line and space without "line pattern collapse" in sub-20nm.
© (2015) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Takaya Matsushita, Takanori Matsumoto, Hidefumi Mukai, Suigen Kyoh, and Kohji Hashimoto "Dry etch challenges for CD shrinkage in memory process", Proc. SPIE 9428, Advanced Etch Technology for Nanopatterning IV, 942807 (17 March 2015); https://doi.org/10.1117/12.2085628
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CITATIONS
Cited by 3 scholarly publications.
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KEYWORDS
Etching

Silicon

Critical dimension metrology

Silica

Double patterning technology

Optical lithography

Photomasks

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