Mr. Junichi Seki Profile

Junichi Seki

at Canon Inc

SPIE Involvement:

Author

Publications (11)

Proceedings Article | 26 August 2024 Paper

NIL solutions using computational lithography for semiconductor device manufacturing

Yukio Nakano, Kenji Yamamoto, Sentaro Aihara, Hiromu Kijima, Satoru Jimbo, Humberto Evans, Shingo Ishida, Masayoshi Fujimoto, Shota Takami, Yuichiro Oguchi, Junichi Seki, Toshiya Asano, Osamu Morimoto

Proceedings Volume 13177, 1317709 (2024) https://doi.org/10.1117/12.3032446

KEYWORDS: Nanoimprint lithography, Artificial intelligence, Lithography, Overlay metrology, Metrology, Optical lithography, Data modeling, Manufacturing, Computer simulations, Semiconducting wafers

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Proceedings Article | 10 April 2024 Presentation + Paper

NIL solutions using computational lithography for semiconductor device manufacturing

Sentaro Aihara, Kenji Yamamoto, Yukio Nakano, Hiromu Kijima, Satoru Jimbo, Humberto Evans, Shingo Ishida, Masayoshi Fujimoto, Shota Takami, Yuichiro Oguchi, Junichi Seki, Toshiya Asano, Osamu Morimoto

Proceedings Volume 12954, 129540Z (2024) https://doi.org/10.1117/12.3009839

KEYWORDS: Nanoimprint lithography, Artificial intelligence, Lithography, Metrology, Computer simulations

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Proceedings Article | 30 April 2023 Presentation

Refinements of a nanoimprint process simulator

Shingo Ishida, Junichi Seki, Yuichiro Oguchi, Naoki Kiyohara, Koshiro Suzuki, Kohei Nagane, Shintaro Narioka, Yoshihiro Shiode, Sentaro Aihara, Toshiya Asano

Proceedings Volume 12495, 124950N (2023) https://doi.org/10.1117/12.2657058

KEYWORDS: Nanoimprint lithography, Optical lithography, Ultraviolet radiation, Physics, Performance modeling, Nanotechnology, Manufacturing equipment, Manufacturing, Lithography, Device simulation

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SPIE Journal Paper | 4 January 2022

Enabling nanoimprint simulator for quality verification: process-design co-optimization toward high-volume manufacturing

Junichi Seki, Yuichiro Oguchi, Naoki Kiyohara, Koshiro Suzuki, Kohei Nagane, Shintaro Narioka, Takahiro Nakayama, Yoshihiro Shiode, Sentaro Aihara, Toshiya Asano

JM3, Vol. 21, Issue 01, 011005, (January 2022) https://doi.org/10.1117/12.10.1117/1.JMM.21.1.011005

KEYWORDS: Nanoimprint lithography, Photoresist processing, Computer simulations, Distortion, Manufacturing, Head, Solids, Optical lithography, High volume manufacturing, Resistance

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Proceedings Article | 23 August 2021 Paper

NIL integration using computational lithography for semiconductor device manufacturing

Tsuyoshi Arai, Sentaro Aihara, Yuichiro Oguchi, Junichi Seki, Yoichi Matsuoka

Proceedings Volume 11908, 119080E (2021) https://doi.org/10.1117/12.2600797

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Imprint lithography is an effective and well-known technique for replication of nano-scale features. Nanoimprint lithography (NIL) manufacturing equipment utilizes a patterning technology that involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. The technology faithfully reproduces patterns with a higher resolution and greater uniformity compared to those produced by photolithography equipment. Additionally, as this technology does not require an array of wide-diameter lenses and the expensive light sources necessary for advanced photolithography equipment, NIL equipment achieves a simpler, more compact design, allowing for multiple units to be clustered together for increased productivity. Previous studies have demonstrated NIL resolution better than 10nm, making the technology suitable for the printing of several generations of critical memory levels with a single mask. In addition, resist is applied only where necessary, thereby eliminating material waste. Computational technologies are still in the course of development for NIL. Only a few simulators are applicable to the nanoimprint process, and these simulators are desired by device manufacturers as part of their daily toolbox. The most challenging issue in NIL process simulation is the scale difference of each component of the system. The template pattern depth and the residual resist film thickness are generally of the order of a few tens of nanometers, while the process needs to work over the entire shot size, which is typically of the order of 10 mm square. This amounts to a scale difference of the order of 106. Therefore, in order to calculate the nanoimprint process with conventional fluid structure interaction (FSI) simulators, an enormous number of meshes is required, which results in computation times that are unacceptable. In this paper, we introduce a new process simulator which directly inputs the process parameters, simulates the whole imprinting process, and evaluates the quality of the resulting resist film. To overcome the scale differences, our simulator utilizes analytically integrated expressions which reduce the dimensions of the calculation region. In addition, the simulator can independently consider the positions of the droplets and calculate the droplet coalescence, thereby predicting the distribution of the non-fill areas which originate from the trapped gas between the droplets. The simulator has been applied to the actual NIL system and some examples of its applications are presented in this work.

Proceedings Article | 22 February 2021 Presentation + Paper

Addressing NIL integration for semiconductor device manufacturing

Sentaro Aihara, Noburu Takakura, Fuma Kizu, Satoru Jimbo, Koji Ishibashi, Junichi Seki, Yuichiro Oguchi, Toshiya Asano, Yoichi Matsuoka, Masahiro Tamura, Osamu Morimoto

Proceedings Volume 11610, 1161007 (2021) https://doi.org/10.1117/12.2584720

KEYWORDS: Nanoimprint lithography, Manufacturing, Computational lithography, Semiconductors, Semiconductor manufacturing, Optical lithography, Semiconducting wafers, Photomasks, Ultraviolet radiation, Physics

Read Abstract +

Imprint lithography is an effective and well-known technique for replication of nano-scale features. Nanoimprint lithography (NIL) manufacturing equipment utilizes a patterning technology that involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. The technology faithfully reproduces patterns with a higher resolution and greater uniformity compared to those produced by photolithography equipment. Additionally, as this technology does not require an array of wide-diameter lenses and the expensive light sources necessary for advanced photolithography equipment, NIL equipment achieves a simpler, more compact design, allowing for multiple units to be clustered together for increased productivity. Previous studies have demonstrated NIL resolution better than 10nm, making the technology suitable for the printing of several generations of critical memory levels with a single mask. In addition, resist is applied only where necessary, thereby eliminating material waste. Given that there are no complicated optics in the imprint system, the reduction in the cost of the tool, when combined with simple single level processing and zero waste leads to a cost model that is very compelling for semiconductor memory applications. All lithographic approaches must establish an ecosystem in order to meet the stringent demands for device manufacturing. The table below shows the performance requirements for each category. Throughput is a basic requirement for cost of ownership. Defectivity addresses device yield. Overlay is also needed to enhance device yield. Each device generation places stricter demands on the overlay budget. An infrastructure is required in order to successfully yield advanced devices. In addition, today’s solutions require computational methods and machine learning to meet the requirements described above. The purpose of this paper is to describe the NIL integration requirements, review some of the key solutions for total integration.

Proceedings Article | 21 September 2020 Presentation

Computational lithography and its role in nanoimprint lithography for semiconductor device manufacturing

Toshiya Asano, Junichi Seki, Yuichiro Oguchi, Naoki Kiyohara, Koshiro Suzuki, Kohei Nagane, Hiromi Hiura, Keita Sakai, Mitsuru Hiura, Osamu Morimoto, Yukio Takabayashi, Takehiko Iwanaga

Proceedings Volume 11518, 115180V (2020) https://doi.org/10.1117/12.2574629

KEYWORDS: Nanoimprint lithography, Photomasks, Manufacturing, Optical lithography, Stochastic processes, Computational lithography, Semiconductor manufacturing, Semiconductors, Photoresist processing, Ultraviolet radiation

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Proceedings Article | 23 March 2020 Paper

Enabling nanoimprint simulator for quality verification; process-design co-optimization toward high volume manufacturing

Junichi Seki, Yuichiro Oguchi, Naoki Kiyohara, Koshiro Suzuki, Kohei Nagane, Shintaro Narioka, Takahiro Nakayama, Yoshihiro Shiode, Sentaro Aihara, Toshiya Asano

Proceedings Volume 11328, 113280N (2020) https://doi.org/10.1117/12.2551999

KEYWORDS: Nanoimprint lithography, Computer simulations, Photoresist processing, Manufacturing, Distortion, High volume manufacturing, Solids, Overlay metrology, Fluid dynamics

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Proceedings Article | 3 October 2018 Paper

High volume semiconductor manufacturing using nanoimprint lithography

Zenichi Hamaya, Junichi Seki, Toshiya Asano, Keita Sakai, Ali Aghili, Makoto Mizuno, Jin Choi, Chris Jones

Proceedings Volume 10810, 108100F (2018) https://doi.org/10.1117/12.2501008

KEYWORDS: Photomasks, Particles, Semiconducting wafers, Nanoimprint lithography, Mask cleaning, Polishing, Overlay metrology, Control systems, Surface finishing, Optical lithography

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Proceedings Article | 4 October 2016 Paper

Nanoimprint wafer and mask tool progress and status for high volume semiconductor manufacturing

Yoichi Matsuoka, Junichi Seki, Takahiro Nakayama, Kazuki Nakagawa, Hisanobu Azuma, Kiyohito Yamamoto, Chiaki Sato, Fumio Sakai, Yukio Takabayashi, Ali Aghili, Makoto Mizuno, Jin Choi, Chris Jones

Proceedings Volume 9985, 99851G (2016) https://doi.org/10.1117/12.2243114

KEYWORDS: Photomasks, Lithography, Nanoimprint lithography, Semiconducting wafers, Semiconductors, Particles, Semiconductor manufacturing, Curtains, Image resolution, Manufacturing

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Proceedings Article | 20 March 2008 Paper

A method for fabricating below 22nm feature patterns in quartz mold

Atsunori Terasaki, Junichi Seki, Haruhito Ono

Proceedings Volume 6921, 69211N (2008) https://doi.org/10.1117/12.771561

KEYWORDS: Chromium, Etching, Photomasks, Quartz, Scanning electron microscopy, Photoresist processing, Nanoimprint lithography, Lithography, Image processing, Plasma

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Showing 5 of 11 publications

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