Tool-induced shift (TIS) is a common method used to quantify measurement error or accuracy of an overlay (OVL) metrology tool and is often attributed to tool asymmetry issues. In a previous paper, we introduced Modeled-TIS (mTIS), a machine learning (ML) based algorithm to predict per-site TIS correction on Image- Based Overlay (IBO) measurements. Recently, we adapted mTIS to support the requirements of high-volume manufacturing (HVM) in 3D NAND production. During our work in an HVM environment, we observed that the mTIS model is sensitive to complex process variations and many tool states. Such variations can change the measurement distribution and deteriorate the mTIS accuracy and reliability over time. In this paper, we present an automatic retrain triggering mechanism (“Trigger”) to monitor and adaptively update mTIS. The proposed methodology incorporates statistical and unsupervised ML algorithms which automatically detect shifts in measurement distribution, and initiate data collection to continuously adjust the model to process variations and tool states. The proposed mechanism does not require periodic retraining but rather initiates data collection and model updates only when required. Trigger chooses the wafers which possess novel information reducing the number of wafers required for the training and time to the model, critical requirements for our customers. We demonstrate the mTIS results of Trigger on various 3D NAND layers running in production. Finally, our approach can also be applied to future ML-based solutions.
Tool Induced Shift (TIS) is a measurement error commonly used to measure the accuracy of metrology tools. TIS manifests in the difference in overlay (OVL) misregistration between measurements of the same target at 0ᴼ and 180ᴼ rotations. This inaccuracy is attributed to tool asymmetries and is commonly caused by lens aberrations, lens alignment, illumination alignment and the tool’s interaction with target asymmetries. TIS impacts tool Total Measurement Uncertainty (TMU) and tool-to-tool matching. In memory chips, particularly 3D NAND, TMU is limited by TIS distribution across wafer, as it depends on process stability and is amplified by high layer topology. Additionally, TIS is influenced by wafer-to-wafer and lot-to-lot process variation. TIS correction by direct measurement per site (TIS-onLink, ToL) incurs a heavy penalty to measurement throughput as it requires measuring each site twice. Alternatively, measuring TIS on a sparse subset of sites, interpolating to other sites (TIS-on-Parent, ToP), induces a lower throughput penalty but is not accurate enough in many cases. In a previous paper we introduced a new methodology to improve overlay measurement with minimum throughput impact - Modeled-TIS (mTIS). This approach uses Machine Learning (ML) algorithms to predict per-site TIS correction on Image-Based Overlay (IBO) measurements. This method gives near ToL TIS correction performance at ToP throughput penalty, or better, depending on the use case. In this paper, we describe some of the algorithmic adaptations we made to the original algorithm to work in a high-volume manufacturing (HVM) environment and present results of an HVM use case on 3D NAND production lots.
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