Special Section on Resolution Enhancement Techniques and Design for Manufacturability

Lithography-simulation-based design for manufacturability rule development: an integrated circuit design house’s approach

[+] Author Affiliations
Jonathan Ho

Xilinx Incorporated, 2100 Logic Drive, San Jose, California 95124

Yan Wang

Xilinx Incorporated, 2100 Logic Drive, San Jose, California 95124

Joanne Wu

Anchor Semiconductor, Incorporated, 5403 Betsy Ross Road, Santa Clara, California 95054

Ya-Ching Hou

United Microelectronics Corporation, Number 18, Nan-Ke Second Road, Tainan Science Based Industrial Part, Shinshi Township, Tainan County, Taiwan

Kechih Wu

Anchor Semiconductor, Incorporated, 5403 Betsy Ross Road, Santa Clara, California 95054

J. Micro/Nanolith. MEMS MOEMS. 6(3), 031008 (September 24, 2007). doi:10.1117/1.2781584
History: Received May 01, 2006; Revised July 09, 2007; Accepted July 31, 2007; Published September 24, 2007
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We describe design house approaches for design rule developments with emphasis of valuations of pre-optical proximity correction (pre-OPC) layouts and their simulation results. To begin, we describe the procedure of the simulation model calibration. An evaluation of metrics for analyzing the design layouts is then described. Due to the unavailability of post-OPC layouts, both pre-OPC and trial-OPC simulations are studied. A range of layout pattern density, within which the pre-OPC metric follows the post-OPC’s, is estimated. Within this pattern density range, pre-OPC layout then can be evaluated to identify potential process “hot spots.” With this approach, a set of design for manufacturability (DFM) compliance design rules is derived and applied to the product developments for both 90- and 65-nm process technology nodes. Several hot spots in the products (designed with 90-nm design rules) are located and fixed using layout optimization guided by the DFM rules. Simulated image contours and in-line scanning electron microscope (SEM) images validate the approach.

© 2007 Society of Photo-Optical Instrumentation Engineers

Citation

Jonathan Ho ; Yan Wang ; Joanne Wu ; Ya-Ching Hou and Kechih Wu
"Lithography-simulation-based design for manufacturability rule development: an integrated circuit design house’s approach", J. Micro/Nanolith. MEMS MOEMS. 6(3), 031008 (September 24, 2007). ; http://dx.doi.org/10.1117/1.2781584


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